CS R– = 168 Figure 6. Simplified Analog Input The diodes " />
參數(shù)資料
型號(hào): AD7677ACPZ
廠商: Analog Devices Inc
文件頁數(shù): 5/20頁
文件大小: 0K
描述: IC ADC 16BIT DIFF INP 48-LFCSP
標(biāo)準(zhǔn)包裝: 7
系列: PulSAR®
位數(shù): 16
采樣率(每秒): 1M
數(shù)據(jù)接口: 串行,并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 130mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 48-LFCSP-VQ(7x7)
包裝: 托盤
輸入數(shù)目和類型: 1 個(gè)差分,雙極
產(chǎn)品目錄頁面: 778 (CN2011-ZH PDF)
配用: EVAL-AD7677CBZ-ND - BOARD EVALUATION FOR AD7677
REV. A
AD7677
–13–
IN+
IN–
AGND
AVDD
R+ = 168
CS
R– = 168
Figure 6. Simplified Analog Input
The diodes shown in Figure 6 provide ESD protection for the
inputs. Care must be taken to ensure that the analog input sig-
nal never exceeds the absolute ratings on these inputs. This will
cause these diodes to become forward-biased and start conduct-
ing current. These diodes can handle a forward-biased current
of 120 mA maximum. This condition could eventually occur
when the input buffer’s (U1) or (U2) supplies are different from
AVDD. In such case, an input buffer with a short-circuit current
limitation can be used to protect the part.
This analog input structure is a true differential structure. By
using these differential inputs, signals common to both inputs
are rejected as shown in Figure 7, which represents the typical
CMRR over frequency.
FREQUENCY – Hz
90
CMRR
dB
45
75
10k
10M
1k
1M
80
65
100k
55
85
70
60
50
Figure 7. Analog Input CMRR vs. Frequency
During the acquisition phase, for ac signals, the AD7677 behaves
like a one-pole RC filter consisting of the equivalent resis-
tance R+ , R–, and CS. The resistors R+ and R– are typically
168 V and are lumped components made up of some serial
resistors and the on resistance of the switches. The capacitor CS is
typically 60 pF and is mainly the ADC sampling capacitor. This
one-pole filter with a typical –3 dB cutoff frequency of 15.8 MHz
reduces undesirable aliasing effect and limits the noise com-
ing from the inputs.
Because the input impedance of the AD7677 is very high, the
AD7677 can be driven directly by a low impedance source
without gain error. That allows the user to input, as shown in
Figure 5, an external one-pole RC filter between the output of
the amplifier output and the ADC analog inputs to even further
improve the noise filtering done by the AD7677 analog input
circuit. However, the source impedance has to be kept low
because it affects the ac performances, especially the total har-
monic distortion. The maximum source impedance depends
on the amount of total harmonic distortion (THD) that can
be tolerated. The THD degrades proportionally to the source
impedance.
Single to Differential Driver
For applications using unipolar analog signals, a single-ended-
to-differential driver will allow for a differential input into the
part. The schematic is shown in Figure 8.
U2
590
2.5V REF
CC
AD8021
590
AD7677
IN+
IN–
REF
2.5V REF
U1
ANALOG INPUT
(UNIPOLAR)
CC
AD8021
590
Figure 8. Single-Ended-to-Differential Driver Circuit
This configuration, when provided an input signal of 0 to VREF,
will produce a differential
±2.5 V with midscale at 1.25 V.
If the application can tolerate more noise, the AD8138 can
be used.
Driver Amplifier Choice
Although the AD7677 is easy to drive, the driver amplifier needs
to meet at least the following requirements:
The driver amplifier and the AD7677 analog input circuit
have to be able together to settle for a full-scale step of the
capacitor array at a 16-bit level (0.0015%). In the amplifier’s
data sheet, the settling at 0.1% or 0.01% is more commonly
specified. It could significantly differ from the settling time at
a 16-bit level and, therefore, it should be verified prior to the
driver selection. The tiny op-amp, AD8021, which combines
ultralow noise and a high gain bandwidth, meets this settling
time requirement even when used with a high gain up to 13.
The noise generated by the driver amplifier needs to be kept
as low as possible in order to preserve the SNR and transi-
tion noise performance of the AD7677. The noise coming
from the driver is filtered by the AD7677 analog input circuit
one-pole, low-pass filter made by R+, R–, and CS. The SNR
degradation due to the amplifier is:
SNR
LOG
fN e
LOSS
dB
N
=
+
()
20
28
784
4
3
2
π
where
f–3 dB is the –3 dB input bandwidth in MHz of the AD7677
(15.8 MHz) or the cutoff frequency of the input filter if
any used.
N is the noise factor of the amplifiers (1 if in buffer con-
figuration).
eN is the equivalent input noise voltage of each opamp in
nV/(Hz)
1/2.
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