參數(shù)資料
型號: AD7678ASTZRL
廠商: Analog Devices Inc
文件頁數(shù): 8/28頁
文件大?。?/td> 0K
描述: IC ADC 18BIT SAR 100KSPS 48-LQFP
標準包裝: 2,000
系列: PulSAR®
位數(shù): 18
采樣率(每秒): 100k
數(shù)據(jù)接口: 串行,并聯(lián)
轉換器數(shù)目: 1
功率耗散(最大): 26mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-LQFP
供應商設備封裝: 48-LQFP(7x7)
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 1 個差分,雙極
配用: EVAL-AD7678CB-ND - BOARD EVALUATION FOR AD7678
AD7678
Rev. A | Page 16 of 28
Transfer Functions
Except in 18-bit interface mode, the AD7678 offers straight
binary and twos complement output coding when using OB/2C.
See Figure 20 and Table 8 for the ideal transfer characteristic.
000...000
000...001
000...010
111...101
111...110
111...111
ANALOG INPUT
+FS – 1.5 LSB
+FS – 1 LSB
–FS + 1 LSB
–FS
–FS + 0.5 LSB
ADC
CODE
(S
tra
ight
Bina
ry
)
03084-0-026
Figure 20. ADC Ideal Transfer Function
Table 8. Output Codes and Ideal Input Voltages
Description
Analog Input
VREF = 4.096 V
Straight
Binary
(Hex)
Twos
Complement
(Hex)
FSR –1 LSB
4.095962 V
FSR – 2 LSB
4.095924 V
3FFFE
1FFFE
Midscale +
1 LSB
31.25 μV
20001
00001
Midscale
0 V
20000
00000
Midscale –
1 LSB
–31.25 μV
1FFFF
3FFFF
–FSR + 1 LSB
-4.095962 V
00001
20001
–FSR
-4.096 V
1 This is also the code for overrange analog input (VIN+ – VIN–
above VREF – VREFGND).
2 This is also the code for underrange analog input (VIN+ – VIN–
below –VREF + VREFGND).
AVDD
AGND
DGND
DVDD
OVDD
OGND
CNVST
BUSY
SDOUT
SCLK
RD
CS
RESET
PD
2.5V REF
NOTE 1
REFBUFIN
20
CLOCK
AD7678
C/P/DSP
SERIAL PORT
DIGITAL SUPPLY
(3.3V OR 5V)
ANALOG
SUPPLY
(5V)
DVDD
OB/2C
PDBUF
DVDD
50k
100nF
1M
IN+
ANALOG INPUT+
CC
U1
NOTE 4
50
AD8021
+
NOTE 3
NOTE 5
ADR421
10
F
100nF
+
10
F
100nF
+
100nF
+
10
F
IN–
ANALOG INPUT–
CC
U2
NOTE 4
50
AD8021
+
100nF
10
F
MODE1
MODE0
NOTE 2
CREF
REF
REFGND
03084-0-027
NOTES
1. SEE VOLTAGE REFERENCE SECTION.
2. CREF is 10F CERAMIC CAPACITOR OR LOW ESR TANTALUM. CERAMIC SIZE
1206 PANASONIC ECJ-3xB0J106 IS RECOMMENDED. SEE VOLTAGE REFERENCE SECTION.
3. OPTIONAL CIRCUITRY FOR HARDWARE GAIN CALIBRATION.
4.THE AD8021 IS RECOMMENDED. SEE DRIVER AMPLIFIER CHOICE SECTION.
5. OPTION, SEE POWER SUPPLY SECTION.
Figure 21. Typical Connection Diagram (Internal Reference Buffer, Serial Interface)
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