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參數(shù)資料
| 型號： | AD7703ARZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 5/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 20BIT LC2MOS 20-SOIC |
| 標準包裝： | 1 |
| 位數(shù)： | 20 |
| 采樣率（每秒）： | 4k |
| 數(shù)據(jù)接口： | 串行 |
| 轉換器數(shù)目： | 1 |
| 功率耗散（最大）： | 37mW |
| 電壓電源： | 模擬和數(shù)字，雙 ± |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-SOIC（0.295"，7.50mm 寬） |
| 供應商設備封裝： | 20-SOIC W |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 1 個單端，單極；1 個單端，雙極 |
REV. E
AD7703
–13–
VOLTAGE REFERENCE CONNECTIONS
The voltage applied to the VREF pin defines the analog input
range. The specified reference voltage is 2.5 V, but the AD7703
will operate with reference voltages from 1 V to 3 V with little
degradation in performance.
The reference input presents exactly the same dynamic load as
the analog input, but in the case of the reference input, source
resistance and long settling time introduce gain errors rather
than offset errors. Fortunately, most precision references have
sufficiently low output impedance and wide enough bandwidth
to settle to the required accuracy within 62 clock cycles.
The digital filter of the AD7703 removes noise from the reference
input, just as it does with noise at the analog input, and the same
limitations apply regarding lack of noise rejection at integer
multiples of the sampling frequency. Note that the reference
should be chosen to minimize noise below 10 Hz. The AD7703
typically exhibits 1.6 LSB rms noise in its measurements. This
specification assumes a clean reference. Many monolithic band gap
references are available, which can supply the 2.5 V needed for
the AD7703. However, some of these are not specified for noise,
especially in the 0.1 Hz to 10 Hz bandwidth. If the reference noise
in this bandwidth is excessive, it can degrade the performance of
the AD7703. Recommended references are the AD580 and the
LT1019. Both of these 2.5 V references typically have less than
10 V p-p noise in the 0.1 Hz to 10 Hz band.
POWER SUPPLIES AND GROUNDING
AGND is the ground reference voltage for the AD7703, and is
completely independent of DGND. Any noise riding on the AGND
input with respect to the system analog ground will cause con-
version errors. AGND should, therefore, be used as the system
ground and also as the ground for the analog input and the
reference voltage.
The analog and digital power supplies to the AD7703 are inde-
pendent and separately pinned out to minimize coupling between
analog and digital sections of the device. The digital filter will
provide rejection of broadband noise on the power supplies,
except at integer multiples of the sampling frequency. There-
fore, the two analog supplies should be individually decoupled
to AGND using 100 nF ceramic capacitors to provide power
supply noise rejection at these frequencies. The two digital
supplies should similarly be decoupled to DGND.
The positive digital supply (DVDD) must never exceed the positive
analog supply (AVDD) by more than 0.3 V. Power supply sequenc-
ing is, therefore, important. If separate analog and digital supplies
are used, care must be taken to ensure that the analog supply is
powered up first.
It is also important that power is applied to the AD7703 before
signals at VREF, AIN, or the logic input pins in order to avoid
any possibility of latch-up. If separate supplies are used for
the AD7703 and the system digital circuitry, the AD7703 should
be powered up first.
A typical scheme for powering the AD7703 from a single set of
±5 V rails is shown in Figure 7. In this circuit, AVDD and DVDD
are brought along separate tracks from the same 5 V supply.
Thus, there is no possibility of the digital supply coming up
before the analog supply.
SLEEP MODE
The low power standby mode is initiated by taking the
SLEEP
input low, which shuts down all analog and digital circuits and
reduces power consumption to 10 W. When coming out of
SLEEP mode, it is sometimes possible (when using a crystal to
generate CLKIN, for example) to lose the calibration coeffi-
cients. Therefore, it is advisable as a safeguard to always do a
calibration cycle after coming out of SLEEP mode.
DIGITAL INTERFACE
The AD7703’s serial communications port allows easy inter-
facing to industry-standard microprocessors. Two different
modes of operation are available, optimized for different types
of interface.
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| AD7703BN | 功能描述:IC ADC 20BIT LC2MOS 20-DIP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉換器 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 位數(shù):12 采樣率（每秒）:3M 數(shù)據(jù)接口:- 轉換器數(shù)目:- 功率耗散（最大）:- 電壓電源:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 供應商設備封裝:SOT-23-6 包裝:帶卷 (TR) 輸入數(shù)目和類型:- |
| AD7703BNZ | 功能描述:IC ADC 20BIT LC2MOS MONO 20DIP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉換器 系列:- 其它有關文件:TSA1204 View All Specifications 標準包裝:1 系列:- 位數(shù):12 采樣率（每秒）:20M 數(shù)據(jù)接口:并聯(lián) 轉換器數(shù)目:2 功率耗散（最大）:155mW 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應商設備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數(shù)目和類型:4 個單端，單極；2 個差分，單極 產(chǎn)品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6 |
| AD7703BQ | 制造商:AD 制造商全稱:Analog Devices 功能描述:LC2MOS 20-Bit A/D Converter |
| AD7703BR | 功能描述:IC ADC 20BIT LC2MOS 20-SOIC RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉換器 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 位數(shù):12 采樣率（每秒）:3M 數(shù)據(jù)接口:- 轉換器數(shù)目:- 功率耗散（最大）:- 電壓電源:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 供應商設備封裝:SOT-23-6 包裝:帶卷 (TR) 輸入數(shù)目和類型:- |
| AD7703BR-REEL | 功能描述:IC ADC 20BIT LC2MOS MONO 20-SOIC RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉換器 系列:- 標準包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應商設備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
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