參數(shù)資料
型號: AD7715ARZ-3REEL
廠商: Analog Devices Inc
文件頁數(shù): 28/40頁
文件大小: 0K
描述: IC ADC 16BIT SIGMA-DELTA 16SOIC
標準包裝: 1,000
位數(shù): 16
采樣率(每秒): 500
數(shù)據(jù)接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 9.5mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 16-SOIC W
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 1 個差分,單極;1 個差分,雙極
配用: EVAL-AD7715-3EBZ-ND - BOARD EVALUATION FOR AD7715
AD7715
Rev. D | Page 34 of 40
CODE FOR SETTING UP THE AD7715
a set of read and write routines in C code for interfacing the
68HC11 microcontroller to the AD7715. The sample program
sets up the various registers on the AD7715 and reads 1000
samples from the part into the 68HC11. The setup conditions
on the part are exactly the same as those outlined for the
flowchart of Figure 10. In the example code given here, the
DRDY output is polled to determine if a new valid word is
available in the data register.
The sequence of the events in this program are as follows:
1.
Write to the communications register, setting the gain to 1
with standby inactive.
2.
Write to the setup register, setting bipolar mode, buffer
off, no filter synchronization, confirming a clock frequency
of 2.4576 MHz, setting the output rate for 60 Hz and
initiating a self-calibration.
3.
Poll the DRDY output.
4.
Read the data from the data register.
5.
Loop around doing Step 3 and Step 4 until the specified
number of samples have been taken.
C CODE FOR INTERFACING AD7715 TO 68HC11
/* This program has read and write routines for the 68HC11 to interface to the AD7715 and the sample
program sets the various registers and then reads 1000 samples from the part. */
#include <math.h>
#include <io6811.h>
#define NUM_SAMPLES 1000 /* change the number of data samples */
#define MAX_REG_LENGTH 2 /* this says that the max length of a register is 2 bytes */
Writetoreg (int);
Read (int,char);
char *datapointer = store;
char store[NUM_SAMPLES*MAX_REG_LENGTH + 30];
void main()
{
/* the only pin that is programmed here from the 68HC11 is the /CS and this is why the PC2 bit
of PORTC is made as an output */
char a;
DDRC = 0x04; /* PC2 is an output the rest of the port bits are inputs */
PORTC | = 0x04; /* make the /CS line high */
Writetoreg(0x10); /* set the gain to 1, standby off and set the next operation as write to the setup
register */
Writetoreg(0x68); /* set bipolar mode, buffer off, no filter sync, confirm clock as 2.4576MHz, set
output rate to 60Hz and do a self calibration */
while(PORTC & 0x10); /* wait for /DRDY to go low */
for(a=0;a<NUM_SAMPLES;a++);
{
Writetoreg(0x38); /*set the next operation for 16 bit read from the data register */
Read(NUM_SAMPLES,2);
}
Writetoreg(int byteword);
{
int q;
SPCR = 0x3f;
SPCR = 0X7f; /* this sets the WiredOR mode(DWOM=1), Master mode(MSTR=1), SCK idles high(CPOL=1), /SS
can be low always (CPHA=1), lowest clock speed(slowest speed which is master clock /32 */
DDRD = 0x18; /* SCK, MOSI outputs */
q = SPSR;
q = SPDR; /* the read of the staus register and of the data register is needed to clear the interrupt
which tells the user that the data transfer is complete */
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