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參數(shù)資料
| 型號： | AD7789BRMZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 7/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 24BIT LP 10-MSOP |
| 標準包裝： | 50 |
| 位數(shù)： | 24 |
| 采樣率（每秒）： | 16.6 |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 230µW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-TFSOP，10-MSOP（0.118"，3.00mm 寬） |
| 供應商設備封裝： | 10-MSOP |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 1 個差分，單極；1 個差分，雙極 |
| 產(chǎn)品目錄頁面： | 779 (CN2011-ZH PDF) |
AD7788/AD7789
Rev. B | Page 15 of 20
The serial interface can be reset by writing a series of 1s on the
DIN input. If a Logic 1 is written to the AD7788/AD7789 for
at least 32 serial clock cycles, the serial interface is reset. This
ensures that the interface can be reset to a known state if the
interface gets lost due to a software error or a glitch in the
system. Reset returns the interface to the state in which it is
expecting a write to the communications register. This oper-
ation resets the contents of all registers to their power-on values.
The AD7788/AD7789 can be configured to continuously
convert or to perform a single conversion. See Figure 11
through Figure 13.
Single Conversion Mode
In single-conversion mode, the AD7788/AD7789 are placed in
power-down mode between conversions. When a single conver-
sion is initiated by setting MD1 to 1 and MD0 to 0 in the mode
register, the AD7788/AD7789 power up, perform a single con-
version, and then return to power-down mode. The devices
require 1 ms to power up and settle. The AD7788/AD7789
then perform a conversion, requiring a time period of
2 × tADC. DOUT/RDY goes low to indicate the completion of a
conversion.
When the data-word has been read from the data register,
DOUT/RDY goes high. If CS is low, DOUT/RDY remains high
until another conversion is initiated and completed. The data
register can be read several times, if required, even when
DOUT/ RDY has gone high.
Continuous Conversion Mode
This is the default power-up mode. The AD7788/AD7789
continuously convert, the RDY pin in the status register going
low each time a conversion is complete. If CS is low, the
DOUT/RDY line also goes low when a conversion is complete.
To read a conversion, the user can write to the communications
register, indicating that the next operation is a read of the data
register. The digital conversion is placed on the DOUT/RDY
pin as soon as SCLK pulses are applied to the ADC. DOUT/
RDY returns high when the conversion is read. The user can
read this register additional times, if required. However, the
user must ensure that the data register is not being accessed
at the completion of the next conversion or else the new
conversion word is lost.
03539-
010
DIN
0x10
0x82
DATA
SCLK
DOUT/RDY
CS
0x38
Figure 11. Single Conversion
03539-
012
DIN
SCLK
DOUT/RDY
CS
0x38
DATA
Figure 12. Continuous-Conversion Mode
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參數(shù)描述 |
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| AD7789BRMZ-REEL | 功能描述:IC ADC 24BIT SIGMA-DELTA 10MSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:2,500 系列:- 位數(shù):16 采樣率（每秒）:15 數(shù)據(jù)接口:MICROWIRE?，串行，SPI? 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:480µW 電壓電源:單電源 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:38-WFQFN 裸露焊盤 供應商設備封裝:38-QFN（5x7） 包裝:帶卷 (TR) 輸入數(shù)目和類型:16 個單端，雙極；8 個差分，雙極 配用:DC1011A-C-ND - BOARD DELTA SIGMA ADC LTC2494 |
| AD779 | 制造商:AD 制造商全稱:Analog Devices 功能描述:14-Bit 128 kSPS Complete Sampling ADC |
| AD7790 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Low Power, 16-Bit Buffered Sigma-Delta ADC |
| AD779-05A6 | 制造商: 功能描述: 制造商:undefined 功能描述: |
| AD7790B | 制造商:AD 制造商全稱:Analog Devices 功能描述:Low Power, 16-Bit Buffered Sigma-Delta ADC |
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