參數(shù)資料
型號: AD7808
廠商: Analog Devices, Inc.
英文描述: +3.3 V to +5 V Quad/Octal 10-Bit DACs
中文描述: 3.3伏至5伏四/八通道10位DAC
文件頁數(shù): 23/28頁
文件大小: 300K
代理商: AD7808
AD7804/AD7805/AD7808/AD7809
–23–
REV. A
AD7805/AD7809–ADSP-2101 Interface
Figure 38 shows a parallel interface between the AD7805/AD7809
and the ADSP-2101/ADSP-2103 digital signal processor.
Fast interface timing allows the AD7805/AD7809 interface
directly to the DSP. In this interface an external timer is used to
update the DACs.
DATA BUS
A0
LDAC
A1
CS
WR
DMD0
DMD15
ADSP-2101*/
ADSP-2103*
TIMER
MODE
ADDR
DECODE
ADDRESS BUS
DMA0
DMA14
DMS
EN
WR
DB0
DB9
*
*ADDITIONAL PINS OMITTED FOR CLARITY
**A2 CONTAINED ON THE AD7809 ONLY
AD7805*/
AD7809
A2**
Figure 38. AD7805/AD7809–ADSP-2101/ADSP-2103
Interface
Data is loaded to the AD7805/AD7809 input register using the
following instruction:
DM(DAC) = MR0,
MR0 = ADSP-2101 MR0 Register.
DAC = Decoded DAC Address.
AD7805/AD7809–TMS32020 Interface
Figure 39 shows a parallel interface between the AD7805/AD7809
and the TMS32020 processor.
ADDR
DECODE
EN
DATA BUS
ADDRESS BUS
A0 A1
CS
DB0
DB9
LDAC
A0
A15
IS
D0
D15
TMS32020
WR
STRB
R/
W
*
*ADDITIONAL PINS OMITTED FOR CLARITY
**A2 CONTAINED ON THE AD7809 ONLY
AD7805*/
AD7809
A2**
Figure 39. AD7805/AD7809–TMS32020 Interface
Again fast interface timing allows the AD7805/AD7809 inter-
face directly to the processor. Data is loaded to the AD7805/
AD7809 input latch using the following instruction:
OUT DAC, D.
DAC = Decoded DAC Address.
D = Data Memory Address.
Certain applications may require that the updating of the DAC
latch be controlled by the microprocessor rather than the exter-
nal timer. One option as shown in the TMS32020 interface is to
decode the
LDAC
from the address bus so that a write opera-
tion to the DAC latch (at a separate address to the input latch)
updates the output.
AD7805/AD7809–8051/8088 Interface
Figure 40 shows a parallel interface between the AD7805/
AD7809 and the 8051/8088 processors.
ADDRESS/DATA BUS
OCTAL
LATCH
MODE
WR
ALE
8051/8088
*
*ADDITIONAL PINS OMITTED FOR CLARITY
**A2 CONTAINED ON THE AD7809 ONLY
ADDR
DECODE
ADDRESS BUS
A0
A1
CS
AD7805*/
AD7809
A8
A15
PSEN
OR
DEN
EN
LDAC
WR
AD7
AD0
A2**
DB0
DB9
Figure 40. AD7805/AD7809–8051/8088 Interface
相關(guān)PDF資料
PDF描述
AD7809 +3.3 V to +5 V Quad/Octal 10-Bit DACs
AD7804 +3.3 V to +5 V Quad/Octal 10-Bit DACs
AD7804BN ECONOLINE: REC2.2-S_DRW(Z)/H* - 2.2W DIP Package- 1kVDC Isolation- Regulated Output- 4.5-9V, 9-18V, 18-36V, 36-72V Wide Input Range 2 : 1- UL94V-0 Package Material- Continuous Short Circiut Protection- Cost Effective- 100% Burned In- Efficiency to 84%
AD7804BR +3.3 V to +5 V Quad/Octal 10-Bit DACs
AD7805BN %2B3.3V to %2B5V Quad/Octal 10-Bit DACs
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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AD7808BNZ 功能描述:IC DAC 10BIT OCTAL SERIAL 24DIP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 標準包裝:2,400 系列:- 設(shè)置時間:- 位數(shù):18 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:3 電壓電源:模擬和數(shù)字 功率耗散(最大):- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:36-TFBGA 供應(yīng)商設(shè)備封裝:36-TFBGA 包裝:帶卷 (TR) 輸出數(shù)目和類型:* 采樣率(每秒):*
AD7808BNZ 制造商:Analog Devices 功能描述:10BIT DAC OCTAL SERIAL 7808 DIP24
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AD7808BR-REEL 功能描述:IC DAC 10BIT OCTAL SRL 24-SOIC RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓模塊:Data Converter Fundamentals DAC Architectures 標準包裝:750 系列:- 設(shè)置時間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:雙 ± 功率耗散(最大):100mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-LCC(J 形引線) 供應(yīng)商設(shè)備封裝:28-PLCC(11.51x11.51) 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓,單極;1 電壓,雙極 采樣率(每秒):143k