參數(shù)資料
型號: AD781ANZ
廠商: Analog Devices Inc
文件頁數(shù): 7/8頁
文件大小: 0K
描述: IC AMP SAMPLE HOLD LP 5MA 8DIP
標準包裝: 50
放大器類型: 采樣和保持
電路數(shù): 1
-3db帶寬: 4MHz
電流 - 輸入偏壓: 50nA
電流 - 電源: 4mA
電流 - 輸出 / 通道: 5mA
電壓 - 電源,單路/雙路(±): ±10.8 V ~ 13.2 V
工作溫度: -40°C ~ 85°C
安裝類型: 通孔
封裝/外殼: 8-DIP(0.300",7.62mm)
供應(yīng)商設(shè)備封裝: 8-PDIP
包裝: 管件
AD781
REV. A
–7–
common pin should also be connected to the digital ground,
which is usually tied to analog common at the A-to-D converter.
Figure 4 illustrates the recommended decoupling and grounding
practice.
NOISE CHARACTERISTICS
Designers of data conversion circuits must also consider the
effect of noise sources on the accuracy of the data acquisition
system. A sample-and-hold amplifier that precedes the A-to-D
converter introduces some noise and represents another source
of uncertainty in the conversion process. The noise from the
AD781 is specified as the total output noise, which includes
both the sampled wideband noise of the SHA in addition to the
band limited output noise. The total output noise is the rms
sum of the sampled dc uncertainty and the hold mode noise. A
plot of the total output noise vs. the equivalent input bandwidth
of the converter being used is given in Figure 5.
300
0
1k
10M
200
100
10k
1M
100k
FREQUENCY – Hz
OUTPUT
NOISE
V
rms
Figure 5. RMS Noise vs. Input Bandwidth of ADC
DRIVING THE ANALOG INPUTS
For best performance, it is important to drive the AD781 analog
input from a low impedance signal source. This enhances the
sampling accuracy by minimizing the analog and digital
crosstalk. Signals which come from higher impedance sources
(e.g., over 5 k
) will have a relatively higher level of crosstalk.
For applications where signals have high source impedance, an
operational amplifier buffer in front of the AD781 is required.
The AD711 (precision BiFET op amp) is recommended for
these applications.
HIGH FREQUENCY SAMPLING
Aperture jitter and distortion are the primary factors which limit
frequency domain performance of a sample-and-hold amplifier.
Aperture jitter modulates the phase of the hold command and
produces an effective noise on the sampled analog input. The
magnitude of the jitter induced noise is directly related to the
frequency of the input signal.
A graph showing the magnitude of the jitter induced error vs.
frequency of the input signal is given in Figure 6.
The accuracy in sampling high frequency signals is also con-
strained by the distortion and noise created by the sample-and
hold. The level of distortion increases with frequency and re-
duces the “effective number of bits” of the conversion.
Measurements of Figures 7 and 8 were made using a 14-bit A/D
converter with VIN = 10 V p-p and a sample frequency of
100 kSPS.
1%
1k
1M
0.1%
0.01%
10k
100k
FREQUENCY – Hz
APERTURE JITTER TYPICAL AT 50ps
1/2 BIT @
8 BITS
1/2 BIT @
10 BITS
1/2 BIT @
12 BITS
1/2 BIT @
14 BITS
Figure 6. Error Magnitude vs. Frequency
–65
–95
1M
–80
–90
1k
–85
100
–70
–75
100k
10k
FREQUENCY – Hz
THD
dB
Figure 7. Total Harmonic Distortion vs. Frequency
90
0
100k
20
10
1k
100
30
40
50
60
70
80
10k
FREQUENCY – Hz
S/(N
+
D)
dB
Figure 8. Signal/(Noise and Distortion) vs. Frequency
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