參數(shù)資料
型號(hào): AD7835ASZ-REEL
廠商: Analog Devices Inc
文件頁(yè)數(shù): 2/28頁(yè)
文件大?。?/td> 0K
描述: IC DAC 14BIT QUAD PARA 44-MQFP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 800
設(shè)置時(shí)間: 10µs
位數(shù): 14
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 4
電壓電源: 模擬和數(shù)字,雙 ±
功率耗散(最大): 465mW
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 44-QFP
供應(yīng)商設(shè)備封裝: 44-MQFP(10x10)
包裝: 帶卷 (TR)
輸出數(shù)目和類(lèi)型: 4 電壓,單極;4 電壓,雙極
采樣率(每秒): 100k
AD7834/AD7835
Rev. D | Page 10 of 28
Pin No.
MQFP
Pin No. PLCC
Pin Mnemonic
Description
16 to 29
22 to 35
DB0 to DB13
Parallel Data Inputs. The AD7835 can accept a straight 14-bit parallel word on DB0 to
DB13, where DB13 is the MSB and the BYSHF input is hardwired to a logic high.
Alternatively for byte loading, the bottom eight data inputs, DB0 to DB7, are used for
data loading, and the top six data inputs, DB8 to DB13, should be hardwired to a logic
low. The BYSHF control input selects whether 8 LSBs or 6 MSBs of data are being loaded
into the device.
32
38
DSGB
Device Sense Ground B Input. Used in conjunction with the CLR input for power-on
protection of the DACs. When CLR is low, DAC outputs VOUT3 and VOUT4 are forced to the
potential on the DSGB pin.
36, 35
42, 41
VREF(+)B, VREF()B
Reference Inputs for DACs 3 and 4. These reference voltages are referred to AGND.
38
44
AGND
Analog Ground.
39
1
VDD
Positive Analog Power Supply: 15 V ± 5% or 12 V ± 5%.
40
2
VSS
Negative Analog Power Supply: 15 V ± 5% or 12 V ± 5%.
42, 43
4, 5
VREF(+)A, VREF()A
Reference Inputs for DAC 1 and DAC 2. These reference voltages are referred to AGND.
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