參數(shù)資料
型號: AD7835ASZ-REEL
廠商: Analog Devices Inc
文件頁數(shù): 8/28頁
文件大?。?/td> 0K
描述: IC DAC 14BIT QUAD PARA 44-MQFP
產(chǎn)品培訓模塊: Data Converter Fundamentals
DAC Architectures
標準包裝: 800
設置時間: 10µs
位數(shù): 14
數(shù)據(jù)接口: 并聯(lián)
轉換器數(shù)目: 4
電壓電源: 模擬和數(shù)字,雙 ±
功率耗散(最大): 465mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 44-QFP
供應商設備封裝: 44-MQFP(10x10)
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 4 電壓,單極;4 電壓,雙極
采樣率(每秒): 100k
AD7834/AD7835
Rev. D | Page 16 of 28
BIPOLAR CONFIGURATION
In Figure 20, full-scale and bipolar zero adjustments are
provided by varying the gain and balance on the AD588. R2
varies the gain on the AD588 while R3 adjusts the offset of both
the +5 V and –5 V outputs together with respect to ground.
+15V
+5V
VOUT
(–5V TO +5V)
VCC
6
3
4
C1
1
μF
AGND
DGND
VDD
VOUT
VREF(+)
VREF(–)
VSS
–15V
1ADDITIONAL PINS OMITTED FOR CLARITY
R2
100k
Ω
AD7834/
AD78351
SIGNAL
GND
2
14
15
16
12
8
13
11
10
5
9
7
R3
100k
Ω
R1
39k
Ω
1
AD588
01006-020
For bipolar-zero adjustment, the DAC is loaded with
1000 . . . 0000 and R3 is adjusted until VOUT = 0 V. Full scale
is adjusted by loading the DAC with all 1s and adjusting R2
until VOUT = 5(8191/8192) V = 4.99939 V.
When bipolar zero and full-scale adjustment are not needed, R2
and R3 are omitted. Pin 12 on the AD588 should be connected to
Pin 11, and Pin 5 should be left floating.
Figure 20. Bipolar ±5 V Operation
Figure 20 shows the AD7834/AD7835 setup for ±5 V operation.
The AD588 provides precision ±5 V tracking outputs that are
fed to the VREF(+) and VREF() inputs of the AD7834/AD7835.
The code table for bipolar operation of the AD7834/AD7835 is
shown in Table 13.
Table 13. Code Table for Bipolar Operation1, 2
Binary Number in DAC Latch
MSB
LSB
Analog Output (VOUT)
VREF(
) + VREF (16383/16384) V
11
1111
VREF(
) + VREF (8193/16384) V
10
0000
0001
VREF(
) + VREF (8192/16384) V
10
0000
VREF(
) + VREF (8191/16384) V
01
1111
VREF(
) + VREF (1/16384) V
00
0000
0001
VREF(
) V
00
0000
1 VREF = VREF(+) – VREF().
2 For VREF(+) = +5 V and VREF() = –5 V, 1 LSB = 10 V/214 = 10 V/16384 = 610 μV.
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