operation. When V
參數(shù)資料
型號: AD7845KRZ-REEL
廠商: Analog Devices Inc
文件頁數(shù): 10/12頁
文件大?。?/td> 0K
描述: IC DAC 12BIT MULT LC2MOS 24-SOIC
產(chǎn)品培訓模塊: Data Converter Fundamentals
DAC Architectures
標準包裝: 1,000
設置時間: 5µs
位數(shù): 12
數(shù)據(jù)接口: 并聯(lián)
轉換器數(shù)目: 1
電壓電源: 雙 ±
功率耗散(最大): 150mW
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 24-SOIC(0.295",7.50mm 寬)
供應商設備封裝: 24-SOIC W
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 1 電壓,單極;1 電壓,雙極
采樣率(每秒): 200k
AD7845
REV. B
–7–
UNIPOLAR BINARY OPERATION
Figure 13 shows the AD7845 connected for unipolar binary
operation. When VIN is an ac signal, the circuit performs
2-quadrant multiplication. The code table for Figure 13 is given
in Table I.
Figure 13. Unipolar Binary Operation
Table I. Unipolar Binary Code Table for AD7845
Binary Number In
DAC Register
Analog Output, VOUT
MSB
LSB
1111
–VIN
4095
4096
1000
0000
–VIN
2048
4096
= –1/2 VIN
0000
0001
–VIN
1
4096
0000
0 V
OFFSET AND GAIN ADJUSTMENT FOR FIGURE 13
Zero Offset Adjustment
1. Load DAC with all 0s.
2. Trim R3 until VOUT = 0 V.
Gain Adjustment
1. Load DAC with all 1s.
2. Trim R1 so that VOUT = –VIN
4095
4096
.
In fixed reference applications, full scale can also be adjusted by
omitting R1 and R2 and trimming the reference voltage magni-
tude. For high temperature applications, resistors and potenti-
ometers should have a low temperature coefficient.
BIPOLAR OPERATION
(4-QUADRANT MULTIPLICATION)
The recommended circuit for bipolar operation is shown in
Figure 14. Offset binary coding is used.
The offset specification of this circuit is determined by the
matching of internal resistors RB and RC and by the zero code
offset error of the device. Gain error may be adjusted by varying
the ratio of R1 and R2.
To use this circuit without trimming and keep within the gain
error specifications, resistors R1 and R2 should be ratio
matched to 0.01%.
The code table for Figure 14 is given in Table II.
Figure 14. Bipolar Offset Binary Operation
Table II. Bipolar Code Table for Offset Binary Circuit of
Figure 14
Binary Number In
DAC Register
Analog Output, VOUT
MSB
LSB
1111
+VIN
2047
2048
1000
0000
0001
+VIN
1
2048
1000
0000
0 V
0111
1111
–VIN
1
2048
0000
–VIN
2048
= –VIN
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