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參數(shù)資料
| 型號： | AD7846JPZ-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 10/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 16BIT MONO V-OUT 28-PLCC |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標(biāo)準包裝： | 750 |
| 設(shè)置時間： | 7µs |
| 位數(shù)： | 16 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 雙 ± |
| 功率耗散（最大）： | 100mW |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-LCC（J 形引線） |
| 供應(yīng)商設(shè)備封裝： | 28-PLCC（11.51x11.51） |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 1 電壓，單極；1 電壓，雙極 |
| 采樣率（每秒）： | 143k |
AD7846
Rev. G | Page 18 of 24
APPLICATION HINTS
NOISE
In high resolution systems, noise is often the limiting factor.
With a 10 V span, a 16-bit LSB is 152 μV (–96 dB). Thus, the
noise floor must stay below 96 dB in the frequency range of
interest. Figure 12 shows the noise spectral density for the
AD7846.
GROUNDING
As well as noise, the other prime consideration in high resolution
DAC systems is grounding. With an LSB size of 152 μV and a
load current of 5 mA, 1 LSB of error can be introduced by series
resistance of only 0.03 Ω.
Figure 30 shows recommended grounding for the AD7846 in a
typical application.
ANALOG SUPPLY
DIGITAL SUPPLY
–15V
+15V 0V
DGND
+5V
SIGNAL
GROUND
AD7846*
AD588*
R1
R4
RL
VOUT
(+5V TO –5V)
R2
R3
R5
*ADDITIONAL PINS OMITTED FOR CLARITY
2
9
16
4
9
21
20
6
5
1
3
7
8
15
14
0
8490-
032
Figure 30. AD7846 Grounding
R1 to R5 represent lead and track resistances on the printed
circuit board. R1 is the resistance between the analog power
supply ground and the signal ground. Because current flowing
in R1 is very low (bias current of AD588 sense amplifier), the
effect of R1 is negligible. R2 and R3 represent track resistance
between the AD588 outputs and the AD7846 reference inputs.
Because of the force and sense outputs on the AD588, these
resistances will also have a negligible effect on accuracy.
R4 is the resistance between the DAC output and the load. If RL
is constant, then R4 introduces a gain error only that can be
trimmed out in the calibration cycle. R5 is the resistance
between the load and the analog common. If the output voltage
is sensed across the load, R5 introduces a further gain error,
which can be trimmed out. If, on the other hand, the output
voltage is sensed at the analog supply common, R5 appears as
part of the load and therefore introduces no errors.
PRINTED CIRCUIT BOARD LAYOUT
Figure 31 shows the AD7846 in a typical application with the
AD588 reference, producing an output analog voltage in the
±10 V range. Full-scale and bipolar zero adjustment are
provided by Potentiometer R2 and Potentiometer R3. Latches
(2 × 74LS245) isolate the DAC digital inputs from the active
microprocessor bus and minimize digital feedthrough.
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