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參數(shù)資料
型號: AD7847AR
廠商: Analog Devices Inc
文件頁數(shù): 8/12頁
文件大小: 0K
描述: IC DAC 12BIT MULT DUAL 24-SOIC
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 1
設(shè)置時間: 4µs
位數(shù): 12
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 2
電壓電源: 雙 ±
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 24-SOIC W
包裝: 管件
輸出數(shù)目和類型: 2 電壓,單極;2 電壓,雙極
采樣率(每秒): 250k
AD7837/AD7847
REV. C
–5–
AD7847 PIN FUNCTION DESCRIPTION (DIP AND SOIC PIN NUMBERS)
Pin
Mnemonic
Description
11
CSA
Chip Select Input for DAC A. Active low logic input. DAC A is selected when this input is low.
12
CSB
Chip Select Input for DAC B. Active low logic input. DAC B is selected when this input is low.
13VREFA
Reference Input Voltage for DAC A. This may be an ac or dc signal.
14VOUTA
Analog Output Voltage from DAC A.
15
AGNDA
Analog Ground for DAC A.
16VDD
Positive Power Supply.
17VSS
Negative Power Supply.
18
AGNDB
Analog Ground for DAC B.
19VOUTB
Analog Output Voltage from DAC B.
10
VREFB
Reference Input Voltage for DAC B. This may be an ac or dc signal.
11
DGND
Digital Ground.
12
DB11
Data Bit 11 (MSB).
13
WR
Write Input.
WR is a positive edge triggered input which is used in conjunction with CSA and CSB
to write data to the DAC latches.
14–24
DB10–DB0
Data Bit 10 to Data Bit 0 (LSB).
AD7837 PIN CONFIGURATION
AD7847 PIN CONFIGURATION
DIP AND SOIC
TOP VIEW
(Not to Scale)
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
9
10
11
12
AD7837
AGNDA
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
A0
A1
LDAC
WR
VOUTA
VREFA
RFBA
CS
VDD
VSS
AGNDB
VOUTB
VREFB
DGND
RFBB
TOP VIEW
(Not to Scale)
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
9
10
11
12
AD7847
AGNDA
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
DB8
DB9
DB10
WR
VOUTA
VREFA
CSB
CSA
VDD
VSS
AGNDB
VOUTB
VREFB
DGND
DB11
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