參數(shù)資料
型號: AD7866BRU
廠商: Analog Devices Inc
文件頁數(shù): 24/24頁
文件大?。?/td> 0K
描述: IC ADC 12BIT 2CH DUAL 20-TSSOP
標準包裝: 1
位數(shù): 12
采樣率(每秒): 1M
數(shù)據接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
轉換器數(shù)目: 2
功率耗散(最大): 24mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 20-TSSOP(0.173",4.40mm 寬)
供應商設備封裝: 20-TSSOP
包裝: 管件
輸入數(shù)目和類型: 4 個單端,單極
配用: EVAL-AD7866CBZ-ND - BOARD EVALUATION AD7866
REV. A
AD7866
–9–
Typical Performance Characteristics
FREQUENCY – kHz
0
–35
–115
0
500
100
SNR
dB
200
300
400
–55
–75
–95
50
150
250
350
450
4098 POINT FFT
f
SAMPLE = 1MSPS
fIN = 300kHz
SNR = 70.31dB
THD = –85.47dB
SFDR = –86.64dB
–15
TPC 1. Dynamic Performance
INPUT FREQUENCY – Hz
–61
–75
10k
1M
100k
SINAD
dB
–73
–63
–67
–69
–71
–65
TA = 25 C
VDD = VDRIVE = 2.7V
VDD = VDRIVE = 3.6V
VDD = VDRIVE = 5.25V
VDD = VDRIVE = 4.75V
TPC 2. SINAD vs. Input Frequency
AVDD RIPPLE FREQUENCY – Hz
0
–100
1k
PSRR
dB
10k
–90
–80
–70
–60
–50
–40
–30
–20
–10
100k
1M
100mV p-p SINE WAVE ON AVDD
2.5V EXT REFERENCE ON VREF
TA = 25 C
VDD = 2.7V
VDD = 5.25V
VDD = 4.75V
VDD = 3.6V
TPC 3a. PSRR vs. Supply Ripple Frequency,
without Supply Decoupling
AVDD RIPPLE FREQUENCY – Hz
0
–100
1k
PSRR
dB
10k
–90
–80
–70
–60
–50
–40
–30
–20
–10
100k
1M
100mV p-p SINE WAVE ON AVDD
2.5V EXT REFERENCE ON DCAPA, DCAPB
TA = 25 C
VDD = 2.7V
VDD = 5.25V
VDD = 4.75V
VDD = 3.6V
TPC 3b. PSRR vs. Supply Ripple Frequency,
without Supply Decoupling
PERFORMANCE CURVES
TPC 1 shows a typical FFT plot for the AD7866 at 1 MHz
sample rate and 300 kHz input frequency. TPC 2 shows the
signal-to-(noise + distortion) ratio performance versus input
frequency for various supply voltages while sampling at 1 MSPS
with an SCLK of 20 MHz.
TPCs 3a to 4b show the power supply rejection ratio versus
AVDD supply ripple frequency for the AD7866 under different
conditions. The power supply rejection ratio (PSRR) is defined
as the ratio of the power in the ADC output at full-scale fre-
quency f, to the power of a 100 mV sine wave applied to the
ADC AVDD supply of frequency fS:
PSRR dB
Pf Pf
S
() =
()
10 log
Pf = power at frequency f in ADC output, and PfS = power at
frequency fS coupled onto the ADC AVDD supply. Here, a 100 mV
peak-to-peak sine wave is coupled onto the AVDD supply while the
digital supply is left unaltered. TPCs 3a and 3b show the PSRR
of the AD7866 when there is no decoupling on the supply, while
TPCs 4a and 4b show the PSRR with decoupling capacitors
of 10
F and 0.1 F on the supply.
TPCs 5 and 6 show typical DNL and INL plots for the AD7866.
TPC 7 shows a graph of the total harmonic distortion versus
analog input frequency for various source impedances.
TPC 8 shows a graph of total harmonic distortion versus analog
input frequency for various supply voltages. See the Analog
Input section.
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