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參數(shù)資料
| 型號(hào)： | AD7877ACPZ-500RL7 |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 22/45頁(yè) |
| 文件大小： | 0K |
| 描述： | IC ADC 12BIT TOUCHSCREEN 32LFCSP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | 電阻 |
| 觸摸面板接口： | 4 線 |
| 輸入數(shù)/鍵： | 1 TSC |
| 分辨率（位）： | 12 b |
| 評(píng)估套件： | 可供 |
| 數(shù)據(jù)接口： | 串行，SPI? |
| 數(shù)據(jù)速率/采樣率 (SPS，BPS)： | 125k |
| 電壓基準(zhǔn)： | 外部，內(nèi)部 |
| 電源電壓： | 2.7 V ~ 5.25 V |
| 電流 - 電源： | 1µA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 32-LFCSP-VQ |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 其它名稱： | AD7877ACPZ-500RL7DKR |
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AD7877
Data Sheet
Rev. D | Page 28 of 44
SERIAL INTERFACE
The AD7877 is controlled via a 3-wire serial peripheral
interface (SPI). The SPI has a data input pin (DIN) for inputting
data to the device, a data output pin (DOUT) for reading data
back from the device, and a data clock pin (DCLK) for clocking
data into and out of the device. A chip-select pin (CS) enables
or disables the serial interface.
WRITING DATA
Data is written to the AD7877 in 16-bit words. The first four
bits of the word are the register address that directs the AD7877
to the register to write to. The next 12 bits are data. How the
AD7877 handles the data bits depends on the register address.
Register Address 0000b is a dummy address, which does
nothing. Register Addresses 0010b to Register Address 1110b
are 12-bit registers that perform various functions as described
in the register map.
Register Address 1111b is not a physical register, but enables an
extended writing mode that allows writing to the GPIO
configuration registers. When the register address is 1111b, the
next four bits of the data-word are the address of a GPIO
configuration register and the eight LSBs are the GPIO
configuration data. For details on the configuration of the GPIO
pins, see the General-Purpose I/O Pins section.
Register Address 0001b is a physical register, Control Register 1,
but this is a special register. It contains data for setting up the
ADC channel and operating mode, but Bit 20 to Bit 6 compose
the register address for reading. These define the register that is
read back during the next read operation. Control Register 1
should be the last register in the AD7877 to be programmed
before starting a conversion. The three types of data-words used
for writing are shown in Figure 46.
03796-024
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
16-BIT DATA-WORD
WADD3
WADD2
WADD1
WADD0
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
WRITING TO A REGISTER
12 BITS DATA
4-BIT REGISTER WRITE ADDRESS
1
EADD3
EADD2
EADD1
EADD0
D7
D6
D5
D4
D3
D2
D1
D0
EXTENDED WRITE OPERATION TO GPIO REGISTERS
8 BITS GPIO DATA
4-BIT EXTENDED ADDRESS
0
SER/DFR CHADD3 CHADD2 CHADD1 CHADD0
RADD4
RADD3
RADD2
RADD1
RADD0
MODE 1
MODE 0
WRITING TO CONTROL REGISTER 1 TO SET ADC CHANNEL, MODE, AND READ REGISTER ADDRESS
ADC CHANNEL ADDRESS
5-BIT READ REGISTER ADDRESS
OPERATING
MODE
EXTENDED WRITE ADDRESS
CONTROL REGISTER 1 ADDRESS
NORMAL (SINGLE-ENDED)/
RATIOMETRIC (DIFFERENTIAL)
CONVERSION
Figure 46. Designation of Data-Word Bits in AD7877 Write Operations
03796-025
DCLK
DOUT1
DIN2
CS
NOTES:
1DATA IS CLOCKED OUT ON THE FALLING EDGE OF DCLK.
2INPUT DATA IS SAMPLED ON THE RISING EDGE OF DCLK.
3FOR 8-BIT REGISTERS, 8 LEADING ZEROS PRECEDE 8 BITS OF DATA.
4REGISTER READ ADDRESS INCREMENTS AUTOMATICALLY, PROVIDED THAT A NEW ADDRESS IS NOT WRITTEN TO CONTROL REGISTER 1.
HIGH-Z
1
16
1
16
REGISTER n + 1 DATA4
REGISTER n DATA4
0000 + 12-BIT DATA3
4-BIT ADDRESS + 12-BIT DATA
D15
D0
D15
D0
D15
D0
Figure 47. Overall Read/Write Timing
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