參數(shù)資料
型號(hào)： AD7891YSZ-2
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 7/20頁(yè)
文件大小： 0K
描述： IC DAS 12BIT 8CH 44-MQFP
標(biāo)準(zhǔn)包裝： 1
類型： 數(shù)據(jù)采集系統(tǒng)（DAS）
分辨率（位）： 12 b
采樣率（每秒）： 500k
數(shù)據(jù)接口： 串行，并聯(lián)
電壓電源： 單電源
電源電壓： 5V
工作溫度： -55°C ~ 105°C
安裝類型： 表面貼裝
封裝/外殼： 44-QFP
供應(yīng)商設(shè)備封裝： 44-MQFP（10x10）
包裝： 托盤(pán)
AD7891
–15–
REV. D
As in the 8X51 circuit in Figure 7, the way the 68HC11 is
informed that a conversion is completed is not shown in the
diagram. The
EOC line can be used to inform the 68HC11
that a conversion is complete by using it as an interrupt signal.
The interrupt service routine reads in the result of the conver-
sion. If a software conversion start is used, the 68HC11 can
wait for 2.0
ms (AD7891-2) or 2.2 ms (AD7891-1) before read-
ing from the AD7891.
68HC11*
DATA OUT
AD7891*
*ADDITIONAL PINS OMITTED FOR CLARITY
SCLK
DATA IN
RFS
TFS
PC7
PC6
SCK
MOSI
MOSO
Figure 8. AD7891 to 68HC11 Interface
AD7891 to ADSP-21xx Serial Interface
An interface between the AD7891 and the ADSP-21xx is shown
in Figure 9. In the interface shown, either SPORT0 or SPORT1
can be used to transfer data to the AD7891. When reading
from the part, the SPORT must be set up with a serial word
length of 16 bits. When writing to the AD7891, a serial word
length of 6 bits or more can be used. Other setups for the
serial interface on the ADSP-21xx internal SCLK use alternate
framing mode and active low framing signal. Normally, the
EOC line from the AD7891 would be connected to the IRQ2
line of the ADSP-21xx to interrupt the DSP at the end of a
conversion (not shown in diagram).
ADSP-21xx*
DATA OUT
AD7891*
*ADDITIONAL PINS OMITTED FOR CLARITY
SCLK
DATA IN
RFS
TFS
RFS
TFS
SCLK
DT
DR
Figure 9. AD7891 to ADSP-21xx Serial Interface
AD7891 to DSP5600x Serial Interface
Figure 10 shows a serial interface between the AD7891 and the
DSP5600x series of DSPs. When reading from the AD7891, the
DSP5600x should be set up for 16-bit data transfers, MSB first,
normal mode synchronous operation, internally generated word
frame sync, and gated clock. When writing to the AD7891, 8-bit
or 16-bit data transfers can be used. The frame sync signal from
the DSP5600x must be inverted before being applied to the
RFS and TFS inputs of the AD7891, as shown in Figure 10.
To monitor the conversion time of the AD7891, a scheme such
as those outlined in previous interfaces with
EOC can be used.
This can be implemented by connecting the
EOC line directly
to the
IRQA input of the DSP5600x.
DSP5600x*
DATA OUT
AD7891*
*ADDITIONAL PINS OMITTED FOR CLARITY
SCLK
DATA IN
RFS
TFS
FST (SC2)
SCK
STD
SRD
Figure 10. AD7891 to DSP5600x Serial Interface
AD7891 to TMS320xxx Serial Interface
The AD7891 can be interfaced to the serial port of TMS320xxx
DSPs, as shown in Figure 11. External timing generation circuitry
is necessary to generate the serial clock and syncs necessary for
the interface.
TMS320xxx*
DATA OUT
AD7891*
*ADDITIONAL PINS OMITTED FOR CLARITY
SCLK
DATA IN
RFS
TFS
FSX
CLKX
DX
DR
CLKR
FSR
TIMING
GENERATION
CIRCUITRY
Figure 11. AD7891 to TMS320xxx Serial Interface
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AD7892AN-3 制造商:Rochester Electronics LLC 功能描述:12-BIT 600 KSPS ADC I.C. - Bulk 制造商:Analog Devices 功能描述:
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