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參數(shù)資料
| 型號： | AD7891YSZ-2 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 9/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAS 12BIT 8CH 44-MQFP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | 數(shù)據(jù)采集系統(tǒng)（DAS） |
| 分辨率（位）： | 12 b |
| 采樣率（每秒）： | 500k |
| 數(shù)據(jù)接口： | 串行，并聯(lián) |
| 電壓電源： | 單電源 |
| 電源電壓： | 5V |
| 工作溫度： | -55°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-QFP |
| 供應(yīng)商設(shè)備封裝： | 44-MQFP（10x10） |
| 包裝： | 托盤 |
AD7891
–17–
REV. D
AD7891 to DSP5600x
Figure 15 shows a parallel interface between the AD7891 and
the DSP5600x series of DSPs. The AD7891 should be mapped
into the top 64 locations of Y data memory. If extra wait states
are needed in this interface, they can be programmed using the
Port A Bus control register (see the DSP5600x Users Manual
for details). Data can be read from the AD7891 using the fol-
lowing instruction:
MOVEO Y: ADC, X0
where ADC is the address in the DSP5600x address space to
which the AD7891 has been mapped.
DATA BUS
ADDRESS BUS
DB11 TO DB0
AD7891*
*ADDITIONAL PINS OMITTED FOR CLARITY
CS
WR
IRQ
D23 TO D0
EOC
RD
WR
RD
ADDR
DECODE
DS
A15 TO A0
X/
Y
DSP56000/
DSP56002*
Figure 15. AD7891 to DSP5600x Parallel Interface
Power Supply Bypassing and Grounding
In any circuit where accuracy is important, careful consideration
of the power supply and ground return layout helps to ensure
the specified performance. The PCB on which the AD7891 is
mounted should be designed such that the analog and digital
sections are separated and confined to certain areas of the board.
This facilitates the use of ground planes that can be separated
easily. A minimum etch technique is generally best for ground
planes because it gives the best shielding. Digital and analog
ground planes should be joined at only one place. If the AD7891
is the only device requiring an AGND to DGND connection,
then the ground planes should be connected at the AGND and
DGND pins of the AD7891. If the AD7891 is in a system where
multiple devices require an AGND to DGND connection, the
connection should still be made at one point only, a star ground
point established as close as possible to the AD7891.
Digital lines running under the device should be avoided because
these couple noise onto the die. The analog ground plane should
be allowed to run under the AD7891 to avoid noise coupling.
The power supply lines of the AD7891 should use as large a
trace as possible to provide low impedance paths and reduce the
effects of glitches on the power supply line. Fast switching sig-
nals like clocks should be shielded with digital ground to avoid
radiating noise to other parts of the board and should never be
run near the analog inputs. Avoid crossover of digital and analog
signals. Traces on opposite sides of the board should run at right
angles to each other. This reduces the effects of feedthrough
through the board. A microstrip technique is by far the best
technique but is not always possible with a double-sided board.
In this technique, the component side of the board is dedicated
to ground plane while signal traces are placed on the solder side.
The AD7891 should have ample supply bypassing located as close
to the package as possible, ideally right up against the device.
One of the VDD pins (Pin 10 of the PLCC package and Pin 4
on the MQFP package) mainly drives the analog circuitry on
the chip. This pin should be decoupled to the analog ground
plane with a 10
mF tantalum bead capacitor in parallel with a
0.1
mF capacitor. The other VDD pin (Pin 19 on the PLCC
package and Pin 13 on the MQFP package) mainly drives
digital circuitry on the chip. This pin should be decoupled to the
digital ground plane with a 0.1
mF capacitor. The 0.1 mF
capacitors should have low effective series resistance (ESR) and
effective series inductance (ESI), such as the common ceramic
types or surface mount types, which provide a low impedance
path to ground at high frequencies to handle transient currents
due to internal logic switching. Figure 16 shows the
recommended decoupling scheme.
VDD (PIN 10, PLCC
PIN 4, MQFP)
DGND
AD7891
AGND
VDD (PIN 19, PLCC
PIN 13, MQFP)
10 F
0.1 F
Figure 16. Recommended Decoupling Scheme for
the AD7891
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| AD7892A-2REEL | 制造商:Rochester Electronics LLC 功能描述:- Tape and Reel 制造商:Analog Devices 功能描述: |
| AD7892AN-1 | 功能描述:IC ADC 12BIT LP 500KSPS 24-DIP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
| AD7892AN-2 | 功能描述:IC ADC 12BIT LP 500KSPS 24-DIP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
| AD7892AN-3 | 制造商:Rochester Electronics LLC 功能描述:12-BIT 600 KSPS ADC I.C. - Bulk 制造商:Analog Devices 功能描述: |
| AD7892ANZ-1 | 功能描述:IC ADC 12BIT LP 500KSPS 24DIP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
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