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參數(shù)資料
| 型號： | AD795JRZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 4/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC OPAMP JFET 1.6MHZ LN 8SOIC |
| 標準包裝： | 1,000 |
| 放大器類型： | J-FET |
| 電路數(shù)： | 1 |
| 轉(zhuǎn)換速率： | 1 V/µs |
| -3db帶寬： | 1.6MHz |
| 電流 - 輸入偏壓： | 1pA |
| 電壓 - 輸入偏移： | 100µV |
| 電流 - 電源： | 1.3mA |
| 電流 - 輸出 / 通道： | 10mA |
| 電壓 - 電源，單路/雙路(±)： | 8 V ~ 36 V，±4 V ~ 18 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應商設(shè)備封裝： | 8-SO |
| 包裝： | 帶卷 (TR) |
AD795
Rev. C | Page 12 of 20
CIRCUIT BOARD NOTES
The AD795 is designed for mounting on printed circuit boards
(PCBs). Maintaining picoampere resolution in those environ-
ments requires a lot of care. Both the board and the amplifier’s
package have finite resistance. Voltage differences between the
input pins and other pins as well as PCB metal traces causes
parasitic currents (see Figure 33) larger than the AD795’s input
current unless special precautions are taken. Two methods of
minimizing parasitic leakages include guarding of the input lines
and maintaining adequate insulation resistance.
Figure 34 and Figure 35 show the recommended guarding
schemes for noninverting and inverting topologies. Pin 1 is not
connected, and can be safely connected to the guard. The high
impedance input trace should be guarded on both edges for its
entire length.
00
84
5-
0
33
3
6
2
AD795
+
–
VOUT
CF
VE
VS
IP
IS
RF
CP
RP
VS
IP =
VS
RP
dCP
dT
dV
dT
CP
++
Figure 33. Sources of Parasitic Leakage Currents
00
84
5-
03
4
NOTES
1. ON THE “R” PACKAGE PIN 1, PIN 5, AND PIN 8 ARE OPEN
AND CAN BE CONNECTED TO ANALOG COMMON OR TO
THE DRIVEN GUARD TO REDUCE LEAKAGE.
3
6
2
AD795
+
–
VOUT
CF
IS
RF
GUARD
1
2
3
4
8
7
6
5
TOP VIEW
(“R” PACKAGE)
8
7
6
5
Figure 34. Guarding Scheme—lnverter
00
84
5-
0
35
GUARD TRACES
INPUT
TRACE
1
2
3
4
8
7
6
5
AD795
TOP VIEW
8
7
6
5
CONNECT TO JUNCTION OF
RF AND RI OR TO PIN 6 FOR
UNITY GAIN.
2
6
3
AD795
+
VOUT
VS
RF
GUARD
RI
–
Figure 35. Guard Scheme—Follower
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