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參數(shù)資料
| 型號： | AD795JRZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 7/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC OPAMP JFET 1.6MHZ LN 8SOIC |
| 標準包裝： | 1,000 |
| 放大器類型： | J-FET |
| 電路數(shù)： | 1 |
| 轉換速率： | 1 V/µs |
| -3db帶寬： | 1.6MHz |
| 電流 - 輸入偏壓： | 1pA |
| 電壓 - 輸入偏移： | 100µV |
| 電流 - 電源： | 1.3mA |
| 電流 - 輸出 / 通道： | 10mA |
| 電壓 - 電源，單路/雙路(±)： | 8 V ~ 36 V，±4 V ~ 18 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應商設備封裝： | 8-SO |
| 包裝： | 帶卷 (TR) |
AD795
Rev. C | Page 15 of 20
OVERLOAD ISSUES
Driving the amplifier output beyond its linear region causes
some sticking; recovery to normal operation is within 2 μs of
the input voltage returning within the linear range.
If either input is driven below the negative supply, the amplifier’s
output is driven high, causing a phenomenon called phase
reversal. Normal operation is resumed within 30 μs of the input
voltage returning within the linear range.
Figure 41 shows the AD795’s input bias currents vs. differential
input voltage. Picoamp level input current is maintained for
differential voltages up to several hundred millivolts. This
behavior is only important if the AD795 is in an open-loop
application where substantial differential voltages are produced.
10–4
10–5
10–6
10–7
10–8
10–9
10–10
10–11
10–12
10–13
10–14
–6
–5
–4
–3
–2
–1
0
1
2
3
4
5
6
DIFFERENTIAL INPUT VOLTAGE (±V)
IN
P
UT
BI
AS
CURR
E
NT
(A)
00
84
5-
0
41
+IIN
–IIN
Figure 41. Input Bias Current vs. Differential Input Voltage
INPUT PROTECTION
The AD795 safely handles any input voltage within the supply
voltage range. Some applications may subject the input terminals
to voltages beyond the supply voltages. In these cases, the
following guidelines should be used to maintain the AD795’s
functionality and performance.
If the inputs are driven more than a 0.5 V below the minus
supply, milliamp level currents can be produced through the
input terminals. That current should be limited to 10 mA for
transient overloads (less than 1 second) and 1 mA for continuous
overloads. This can be accomplished with a protection resistor
in the input terminal (as shown in Figure 42 and Figure 43).
The protection resistor’s Johnson noise adds to the amplifier’s
input voltage noise and impacts the frequency response.
Driving the input terminals above the positive supply causes the
input current to increase and limit at 40 μA. This condition is
maintained until 15 V above the positive supply—any input
voltage within this range does not harm the amplifier. Input
voltage above this range causes destructive breakdown and
should be avoided.
0
084
5-
0
42
3
6
2
AD795
CF
RP
RF
SOURCE
Figure 42. Inverter with Input Current Limit
00
84
5-
0
43
2
6
3
AD795
RP
SOURCE
Figure 43. Follower with Input Current Limit
Figure 44 is a schematic of the AD795 as an inverter with an
input voltage clamp. Bootstrapping the clamp diodes at the
inverting input minimizes the voltage across the clamps and
keeps the leakage due to the diodes low. Low leakage diodes
(less than 1 pA), such as the FD333s should be used, and should
be shielded from light to keep photocurrents from being
generated. Even with these precautions, the diodes measurably
increase the input current and capacitance.
To achieve the low input bias currents of the AD795, it is not
possible to use the same on-chip protection as used in other
Analog Devices, Inc., op amps. This makes the AD795 sensitive
to handling and precautions should be taken to minimize ESD
exposure whenever possible.
00
84
5-
0
44
3
6
2
AD795
RF
PROTECTED DIODES
(LOW LEAKAGE)
SOURCE
Figure 44. Input Voltage Clamp with Diodes
00
84
5-
0
45
3
8
6
2
AD795
10pF
OUTPUT
1G
GUARD
PHOTODIODE
FILTERED
OUTPUT
OPTIONAL 26Hz
FILTER
Figure 45. AD795 Used as a Photodiode Preamplifier
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