參數(shù)資料
型號(hào): AD797BR-REEL7
廠商: Analog Devices Inc
文件頁(yè)數(shù): 8/20頁(yè)
文件大?。?/td> 0K
描述: IC OPAMP GP 110MHZ ULDIST 8SOIC
標(biāo)準(zhǔn)包裝: 750
放大器類型: 通用
電路數(shù): 1
轉(zhuǎn)換速率: 20 V/µs
增益帶寬積: 110MHz
-3db帶寬: 8MHz
電流 - 輸入偏壓: 250nA
電壓 - 輸入偏移: 10µV
電流 - 電源: 8.2mA
電流 - 輸出 / 通道: 50mA
電壓 - 電源,單路/雙路(±): ±5 V ~ 15 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SO
包裝: 帶卷 (TR)
AD797
Data Sheet
Rev. J | Page 16 of 20
Differential Line Receiver
The differential receiver circuit of Figure 47 is useful for many
applications, from audio to MRI imaging. The circuit allows
extraction of a low level signal in the presence of common-
mode noise. As shown in Figure 48, the AD797 provides this
function with only 9 nV/√Hz noise at the output. Figure 49
shows the AD797 20-bit THD performance over the audio band
and the 16-bit accuracy to 250 kHz.
**
AD797
00846-
046
6
2
3
1k
DIFFERENTIAL
INPUT
1k
20pF
50pF*
20pF
–VS
+VS
4
7
8
VOUT
OPTIONAL
USE THE POWER SUPPLY BYPASSING
SHOWN IN FIGURE 35.
*
**
Figure 47. Differential Line Receiver
00846-
047
16
6
10M
12
8
100
10
14
1M
100k
10k
1k
FREQUENCY (Hz)
OU
TP
U
T
V
O
LT
A
GE
N
OIS
E(
nV
/√
H
z)
Figure 48. Output Voltage Noise Spectral Density
for Differential Line Receiver
00846-
048
FREQUENCY (Hz)
T
HD
(d
B
)
T
HD
(
%)
–90
300k
–120
–130
300
100
–110
–100
100k
30k
10k
3k
1k
0.003
0.0003
0.001
0.0001
WITHOUT
OPTIONAL
50pF CN
WITH
OPTIONAL
50pF CN
MEASUREMENT
LIMIT
Figure 49. Total Harmonic Distortion (THD) vs. Frequency
for Differential Line Receiver
A General-Purpose ATE/Instrumentation I/O Driver
The ultralow noise and distortion of the AD797 can be
combined with the wide bandwidth, slew rate, and load drive
of a current feedback amplifier to yield a very wide dynamic
range general-purpose driver. The circuit shown in Figure 50
combines the AD797 with the AD811 in just such an application.
Using the component values shown, this circuit is capable of
better than 90 dB THD with a ±5 V, 500 kHz output signal.
The circuit is, therefore, suitable for driving a high resolution
ADC as an output driver in automatic test equipment (ATE)
systems. Using a 100 kHz sine wave, the circuit drives a 600 Ω
load to a level of 7 V rms with less than 109 dB THD and a
10 kΩ load at less than 117 dB THD.
*
7
*
+VS
–VS
AD797
00846-
049
22pF
2k
649
1k
R2
6
3
4
2
7
AD811
6
2
4
3
–VS
*USE THE POWER SUPPLY BYPASSING SHOWN IN FIGURE 35.
VOUT
VIN
Figure 50. A General-Purpose ATE/Instrumentation I/O Driver
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