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參數(shù)資料
| 型號： | AD7992BRMZ-1REEL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 29/29頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 12BIT 2CHAN I2C 10MSOP |
| 標(biāo)準(zhǔn)包裝： | 3,000 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 79k |
| 數(shù)據(jù)接口： | I²C，串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 2.2mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-TFSOP，10-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 10-MSOP |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 2 個(gè)單端，單極 |
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AD7992
Rev. 0 | Page 8 of 28
PIN CONFIGURATION AND PIN FUNCTION DESCRIPTIONS
AD7992
TOP VIEW
1
2
3
4
7
8
9
10
SDA
SCL
VDD
AGND
5
(Not to Scale)
ALERT
6
AS
VIN1
VIN2/REFIN
03263-0-002
CONVST
Figure 3. AD7992 Pin Configuration
Table 5. Pin Function Descriptions
Pin No.
Mnemonic
Function
2, 7
AGND
Analog Ground. Ground reference point for all circuitry on the AD7992. All analog input signals should be
referred to this GND voltage.
3
VDD
Power Supply Input. The VDD range for the AD7992 is from 2.7 V to 5.5 V.
4
VIN2/REFIN
Analog Input 2/Voltage Reference Input. In single-channel mode, this pin becomes the reference voltage input;
an external reference should be applied at this pin. The external reference input range is 1.2 V to VDD. A 0.1 F
and 1F capacitor should be tied between this pin and AGND. If Bit D6 is set to 1 in the configuration register,
the AD7992 operates in single-channel mode. In dual-channel mode, D6 in the configuration register is 0; in
this case, this pin provides the second analog input channel. The reference voltage for the AD7992 is taken
from the power supply voltage in dual-channel mode. See the Configuration Register section and Table 10.
5
VIN1
Analog Input 1. Single-ended analog input channel. The input range is 0 V to REFIN.
6
AS
Logic Input. Address select input that selects one of three I2C addresses for the AD7992, as shown in Table 6.
1
CONVST
Logic Input Signal. Convert start signal. This is an edge-triggered logic input. The rising edge of this signal
powers up the part. The power up time for the part is 1 s. The falling edge of CONVST places the track-and-
hold into hold mode and initiates a conversion. A power-up time of at least 1 s must be allowed for the
CONVST high pulse; otherwise, the conversion result is invalid (see the Modes of Operation section).
8
ALERT/BUSY
Digital Output. Selectable as an ALERT or BUSY output function. When configured as an ALERT, this pin acts as
an out-of-range indicator and, if enabled, becomes active when the conversion result violates the DATAHIGH or
DATALOW register values. See the Limit Registers section. When configured as a BUSY output, this pin becomes
active when a conversion is in progress. Open-drain output. An external pull-up resistor is required.
9
SDA
Digital I/O. Serial bus bidirectional data. Open-drain output. An external pull-up resistor is required.
10
SCL
Digital Input. Serial bus clock. Open-drain output. An external pull-up resistor is required.
Table 6. I2C Address Selection
Part Number
AS Pin
I2C Address
AD7992-0
GND
010 0001
AD7992-0
VDD
010 0010
AD7992-1
GND
010 0011
AD7992-1
VDD
010 0100
AD7992-x1
Float
010 0000
1 If the AS pin is left floating on any of the AD7992 parts, the device address is 010 0000. This gives each AD7992 device three different address options.
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