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| 型號： | AD8001ARZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 3/17頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC OPAMP CF LP LDIST 70MA 8SOIC |
| 標準包裝： | 750 |
| 放大器類型： | 電流反饋 |
| 電路數(shù)： | 1 |
| 轉(zhuǎn)換速率： | 1200 V/µs |
| -3db帶寬： | 715MHz |
| 電流 - 輸入偏壓： | 5µA |
| 電壓 - 輸入偏移： | 2000µV |
| 電流 - 電源： | 5mA |
| 電流 - 輸出 / 通道： | 70mA |
| 電壓 - 電源，單路/雙路(±)： | ±3 V ~ 6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SO |
| 包裝： | 帶卷 (TR) |
REV. D
AD8001
–10–
THEORY OF OPERATION
A very simple analysis can put the operation of the AD8001, a
current feedback amplifier, in familiar terms. Being a current
feedback amplifier, the AD8001’s open-loop behavior is expressed
as transimpedance,
VO/I–IN, or TZ. The open-loop transimped-
ance behaves just as the open-loop voltage gain of a voltage
feedback amplifier, that is, it has a large dc value and decreases
at roughly 6 dB/octave in frequency.
Since the RIN is proportional to 1/gM, the equivalent voltage
gain is just TZ
× g
M, where the gM in question is the trans-
conductance of the input stage. This results in a low open-loop
input impedance at the inverting input, a now familiar result.
Using this amplifier as a follower with gain, Figure 4, basic
analysis yields the following result.
V
G
TS
G
R
G
R
Rg
O
IN
Z
ZIN
IN
M
=×
+×
+
=+
=
≈
()
/
1
2
150
VOUT
R1
R2
RIN
VIN
Figure 4. Follower with Gain
Recognizing that G
× R
IN << R1 for low gains, it can be seen to
the first order that bandwidth for this amplifier is independent
of gain (G). This simple analysis in conjunction with Figure 5
can, in fact, predict the behavior of the AD8001 over a wide
range of conditions.
FREQUENCY – Hz
1M
10
100k
1M
1G
100M
10M
100
100k
10k
1k
T
Z
–
Figure 5. Transimpedance vs. Frequency
Considering that additional poles contribute excess phase at
high frequencies, there is a minimum feedback resistance below
which peaking or oscillation may result. This fact is used to
determine the optimum feedback resistance, RF. In practice,
parasitic capacitance at Pin 2 will also add phase in the feedback
loop, so picking an optimum value for RF can be difficult.
Figure 6 illustrates this problem. Here the fine scale (0.1 dB/
div) flatness is plotted versus feedback resistance. These plots
were taken using an evaluation card which is available to cus-
tomers so that these results may readily be duplicated.
Achieving and maintaining gain flatness of better than 0.1 dB at
frequencies above 10 MHz requires careful consideration of
several issues.
OUTPUT
–
dB
0.1
0
–0.9
1M
10M
100M
–0.1
–0.2
–0.3
–0.4
–0.5
FREQUENCY – Hz
–0.6
–0.7
–0.8
G = +2
RF =
649
RF = 698
RF = 750
Figure 6. 0.1 dB Flatness vs. Frequency
Choice of Feedback and Gain Resistors
Because of the above-mentioned relationship between the band-
width and feedback resistor, the fine scale gain flatness will, to
some extent, vary with feedback resistance. It, therefore, is
recommended that once optimum resistor values have been
determined, 1% tolerance values should be used if it is desired to
maintain flatness over a wide range of production lots. In addition,
resistors of different construction have different associated parasitic
capacitance and inductance. Surface-mount resistors were used
for the bulk of the characterization for this data sheet. It is not
recommended that leaded components be used with the AD8001.
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