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參數(shù)資料
| 型號： | AD8001ARZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 4/17頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC OPAMP CF LP LDIST 70MA 8SOIC |
| 標準包裝： | 750 |
| 放大器類型： | 電流反饋 |
| 電路數(shù)： | 1 |
| 轉(zhuǎn)換速率： | 1200 V/µs |
| -3db帶寬： | 715MHz |
| 電流 - 輸入偏壓： | 5µA |
| 電壓 - 輸入偏移： | 2000µV |
| 電流 - 電源： | 5mA |
| 電流 - 輸出 / 通道： | 70mA |
| 電壓 - 電源，單路/雙路(±)： | ±3 V ~ 6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SO |
| 包裝： | 帶卷 (TR) |
REV. D
AD8001
–11–
Printed Circuit Board Layout Considerations
As to be expected for a wideband amplifier, PC board parasitics
can affect the overall closed-loop performance. Of concern are
stray capacitances at the output and the inverting input nodes. If
a ground plane is to be used on the same side of the board as
the signal traces, a space (5 mm min) should be left around the
signal lines to minimize coupling. Additionally, signal lines
connecting the feedback and gain resistors should be short
enough so that their associated inductance does not cause high
frequency gain errors. Line lengths on the order of less than
5 mm are recommended. If long runs of coaxial cable are being
driven, dispersion and loss must be considered.
Power Supply Bypassing
Adequate power supply bypassing can be critical when optimiz-
ing the performance of a high frequency circuit. Inductance in
the power supply leads can form resonant circuits that produce
peaking in the amplifier’s response. In addition, if large current
transients must be delivered to the load, then bypass capacitors
(typically greater than 1
F) will be required to provide the best
settling time and lowest distortion. A parallel combination of
4.7
F and 0.1 F is recommended. Some brands of electrolytic
capacitors will require a small series damping resistor
≈4.7 for
optimum results.
DC Errors and Noise
There are three major noise and offset terms to consider in a
current feedback amplifier. For offset errors, refer to the equation
below. For noise error the terms are root-sum-squared to give a
net output error. In the circuit in Figure 7 they are input offset
(VIO), which appears at the output multiplied by the noise gain
of the circuit (1 + RF/RI), noninverting input current (IBN
× R
N)
also multiplied by the noise gain, and the inverting input current,
which when divided between RF and RI and subsequently
multiplied by the noise gain always appears at the output as
IBN
×RF. The input voltage noise of the AD8001 is a low 2 nV/
√Hz. At low gains though the inverting input current noise times
RF is the dominant noise source. Careful layout and device
matching contribute to better offset and drift specifications for
the AD8001 compared to many other current feedback ampli-
fiers. The typical performance curves in conjunction with the
following equations can be used to predict the performance of
the AD8001 in any application.
VV
R
IR
R
IR
OUT
IO
F
I
BN
N
F
I
BI
F
=×
+
±×
×
+
±×
11
RF
RI
RN
IBN
VOUT
IBI
Figure 7. Output Offset Voltage
Driving Capacitive Loads
The AD8001 was designed primarily to drive nonreactive loads.
If driving loads with a capacitive component is desired, best
frequency response is obtained by the addition of a small series
resistance, as shown in Figure 8. The accompanying graph
shows the optimum value for RSERIES versus capacitive load. It is
worth noting that the frequency response of the circuit when
driving large capacitive loads will be dominated by the passive
roll-off of RSERIES and CL.
909
RSERIES
RL
500
IN
CL
Figure 8. Driving Capacitive Loads
40
0
25
30
10
5
20
15
20
10
CL – pF
G = +1
R
SERIES
–
Figure 9. Recommended RSERIES vs. Capacitive Load
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