參數(shù)資料
型號(hào)： AD8034ARTZ-REEL7
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 11/25頁(yè)
文件大?。?/td> 0K
描述： IC OPAMP VF R-R DUAL LN SOT23-8
標(biāo)準(zhǔn)包裝： 1
系列： FastFET™
放大器類(lèi)型： 電壓反饋
電路數(shù)： 2
輸出類(lèi)型： 滿(mǎn)擺幅
轉(zhuǎn)換速率： 80 V/µs
-3db帶寬： 80MHz
電流 - 輸入偏壓： 1.5pA
電壓 - 輸入偏移： 1000µV
電流 - 電源： 3.3mA
電流 - 輸出 / 通道： 60mA
電壓 - 電源，單路/雙路(±)： 5 V ~ 24 V，±2.5 V ~ 12 V
工作溫度： -40°C ~ 85°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： SOT-23-8
供應(yīng)商設(shè)備封裝： SOT-23-8
包裝： 標(biāo)準(zhǔn)包裝
產(chǎn)品目錄頁(yè)面： 769 (CN2011-ZH PDF)
其它名稱(chēng)： AD8034ARTZ-REEL7DKR
AD8033/AD8034
Rev. D | Page 18 of 24
LAYOUT, GROUNDING, AND BYPASSING CONSIDERATIONS
BYPASSING
Power supply pins are actually inputs, and care must be taken
so that a noise-free stable dc voltage is applied. The purpose of
bypass capacitors is to create low impedances from the supply
to ground at all frequencies, thereby shunting or filtering a
majority of the noise. Decoupling schemes are designed to
minimize the bypassing impedance at all frequencies with a
parallel combination of capacitors. The chip capacitors, 0.01 μF
or 0.001 μF (X7R or NPO), are critical and should be placed as
close as possible to the amplifier package. Larger chip capacitors,
such as the 0.1 μF capacitor, can be shared among a few closely
spaced active components in the same signal path. The 10 μF
tantalum capacitor is less critical for high frequency bypassing, and
in most cases, only one per board is needed at the supply inputs.
GROUNDING
A ground plane layer is important in densely packed PCBs to
spread the current, thereby minimizing parasitic inductances.
However, an understanding of where the current flows in a
circuit is critical to implementing effective high speed circuit
design. The length of the current path is directly proportional
to the magnitude of the parasitic inductances and, thus, the
high frequency impedance of the path. High speed currents
in an inductive ground return create unwanted voltage noise.
The length of the high frequency bypass capacitor leads is most
critical. A parasitic inductance in the bypass grounding works
against the low impedance created by the bypass capacitor.
Place the ground leads of the bypass capacitors at the same
physical location.
Because load currents flow from the supplies as well, the ground
for the load impedance should be at the same physical location
as the bypass capacitor grounds. For the larger value capacitors
that are intended to be effective at lower frequencies, the current
return path distance is less critical.
LEAKAGE CURRENTS
Poor PCB layout, contaminants, and the board insulator material
can create leakage currents that are much larger than the input
bias currents of the AD8033/AD8034. Any voltage differential
between the inputs and nearby runs set up leakage currents
through the PCB insulator, for example, 1 V/100 GΩ = 10 pA.
Similarly, any contaminants on the board can create significant
leakage (skin oils are a common problem). To significantly reduce
leakages, put a guard ring (shield) around the inputs and input
leads that is driven to the same voltage potential as the inputs.
This way there is no voltage potential between the inputs and
surrounding area to set up any leakage currents. For the guard
ring to be completely effective, it must be driven by a relatively
low impedance source and should completely surround the input
leads on all sides, above, and below using a multilayer board.
Another effect that can cause leakage currents is the charge
absorption of the insulator material itself. Minimizing the amount
of material between the input leads and the guard ring helps to
reduce the absorption. In addition, low absorption materials
such as Teflon or ceramic may be necessary in some instances.
INPUT CAPACITANCE
Along with bypassing and ground, high speed amplifiers can be
sensitive to parasitic capacitance between the inputs and
ground. A few pF of capacitance reduces the input impedance at
high frequencies, in turn it increases the gain of the amplifier
and can cause peaking of the overall frequency response or even
oscillations if severe enough. It is recommended that the external
passive components that are connected to the input pins be placed
as close as possible to the inputs to avoid parasitic capacitance.
The ground and power planes must be kept at a distance of at
least 0.05 mm from the input pins on all layers of the board.
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