參數(shù)資料
型號(hào)： AD8147ACPZ-RL
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 7/24頁(yè)
文件大?。?/td> 0K
描述： IC DRIVER TRIPLE DIFF 24-LFCSP
標(biāo)準(zhǔn)包裝： 5,000
應(yīng)用： 差分
輸出類型： 差分
電路數(shù)： 3
-3db帶寬： 780MHz
轉(zhuǎn)換速率： 3000 V/µs
電流 - 電源： 61.5mA
電流 - 輸出 / 通道： 87mA
電壓 - 電源，單路/雙路(±)： 4.5 V ~ 11 V，±2.25 V ~ 5.5 V
安裝類型： 表面貼裝
封裝/外殼： 24-VFQFN 裸露焊盤(pán)，CSP
供應(yīng)商設(shè)備封裝： 24-LFCSP-VQ（4x4）
包裝： 帶卷 (TR)
Data Sheet
AD8146/AD8147/AD8148
Rev. B | Page 15 of 24
CALCULATING THE INPUT IMPEDANCE
The effective input impedance of a circuit such as that in
Figure 28 at VIP and VIN depends on whether the amplifier is
being driven by a single-ended or differential signal source. For
balanced differential input signals, the differential input impedance,
RIN,dm, between the inputs VIP and VIN for all devices is
RIN, dm = 2 × RG
In the case of a single-ended input signal (for example, if VIN is
grounded and the input signal is applied to VIP), the input
impedance becomes
(
)
+
×
=
F
G
F
G
dm
IN,
R
2
1
The single-ended input impedance of the AD8146 and the
AD8147 is therefore 750 , and the single-ended input
impedance of the AD8148 is 833 .
The input impedance of the circuit is effectively higher than it
would be for a conventional op amp connected as an inverter
because a fraction of the differential output voltage appears at
the inputs as a common-mode signal, partially bootstrapping
the voltage across the input resistor RG.
INPUT COMMON-MODE VOLTAGE RANGE IN
SINGLE-SUPPLY APPLICATIONS
The driver inputs are designed to facilitate level-shifting of
ground-referenced input signals on a single power supply. For a
single-ended input, this implies, for example, that the voltage at
VIN in Figure 28 would be 0 V when the negative power supply
voltage of the amplifier is also set to 0 V.
It is important to ensure that the common-mode voltage at the
amplifier inputs, VAP and VAN, stays within its specified range.
Because voltages VAP and VAN are driven to be essentially equal
by negative feedback, the input common-mode voltage of the
amplifier can be expressed as a single term, VACM. VACM can be
calculated as
3
2 ICM
OCM
ACM
V
+
=
where VICM is the common-mode voltage of the input signal,
that is, VICM = (VIP + VIN)/2.
OUTPUT COMMON-MODE CONTROL
The AD8146 allows the user to control each of the three
common-mode output levels independently through the three
VOCM input pins. The VOCM pins pass a signal to the common-
mode output level of each of their respective amplifiers with
330 MHz of small signal bandwidth and an internally fixed gain
of 1. In this way, additional control and communication signals
can be embedded on the common-mode levels as users see fit.
With no external circuitry, the level at the VOCM input of each
amplifier defaults to approximately midsupply. An internal
resistive divider with an impedance of approximately 12.5 k
sets this level. To limit common-mode noise in dc common-
mode applications, external bypass capacitors should be
connected from each of the VOCM input pins to ground.
SYNC-ON COMMON-MODE
The AD8147 and AD8148 are specifically targeted at driving
RGB video signals over UTP cable using a sync-on common-
mode technique. The common-mode outputs of each of the R,
G, and B differential outputs are set using circuitry contained
within the device. This circuitry embeds the horizontal and
vertical sync pulses on the three common-mode outputs in a
way that also results in low radiated energy. For a more detailed
description of the sync scheme, see the Applications section.
The sync-on common-mode circuit generates a current based
on the SYNC LEVEL input pin (Pin 18). With the SYNC LEVEL
input tied to GND, the common-mode output of all drivers is
set at (VS+ + VS)/2. Using a resistor divider, a voltage can be
applied between GND and SYNC LEVEL that determines the
maximum deviation of the common-mode outputs from their
midsupply level. If, for instance, SYNC LEVEL = 0.5 V and the
supply voltage is 5 V, the common-mode outputs fall within an
envelope of 2.5 V ± 0.5 V. The state of each VOUT,cm output based
on the HSYNC and VSYNC inputs is determined by the equations
defined in the Applications section.
In most cases, the sync-on common-mode circuit can be used
by directly applying the HSYNC and VSYNC signals to their respective
AD8147 or AD8148 inputs. The logic thresholds of the HSYNC
and VSYNC inputs are set to nominally 1.4 V with respect to
GND, and the exposed paddles of the AD8147 and AD8148
are used as the GND references for the incoming sync pulses.
When ±2.5 V supplies are used, however, external protection is
required to limit the positive excursion to less than 2.5 V. For
more details, see the Applications section.
The input paths from the HSYNC and VSYNC inputs to the switches
in the current mode level-shifting circuit are well matched to
eliminate false switching transients, maximizing common-
mode balance and minimizing radiated energy.
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