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| 型號： | AD8147ACPZ-RL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 9/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DRIVER TRIPLE DIFF 24-LFCSP |
| 標(biāo)準(zhǔn)包裝： | 5,000 |
| 應(yīng)用： | 差分 |
| 輸出類型： | 差分 |
| 電路數(shù)： | 3 |
| -3db帶寬： | 780MHz |
| 轉(zhuǎn)換速率： | 3000 V/µs |
| 電流 - 電源： | 61.5mA |
| 電流 - 輸出 / 通道： | 87mA |
| 電壓 - 電源，單路/雙路(±)： | 4.5 V ~ 11 V，±2.25 V ~ 5.5 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 24-LFCSP-VQ（4x4） |
| 包裝： | 帶卷 (TR) |
Data Sheet
AD8146/AD8147/AD8148
Rev. B | Page 17 of 24
–OUT R
+OUT R
–OUT G
+OUT G
–OUT B
+OUT B
VOCM WEIGHTING EQUATIONS:
RED VOCM = K(VSYNC – HSYNC) + VMIDSUPPLY
GREEN VOCM = K(–2VSYNC) + VMIDSUPPLY
BLUE VOCM = K(VSYNC + HSYNC) + VMIDSUPPLY
+IN R
–IN R
VSYNC
HSYNC
SYNC LEVEL
+IN G
–IN G
+IN B
–IN B
R
1k
AD8147/AD8148
500
G
1k
500
VOCM
VOCM B
1k
500
OPD
×2
2
09327-
008
0
0.5
1.0
1.5
2.0
4.0
3.5
4.5
2.5
3.0
5.0
0.98
0.99
1.00
1.01
1.03
1.04
1.05
1.02
1.06
1.07
TIME (s)
HSYNC
VSYNC
2.0
2.1
2.2
2.3
2.4
2.9
2.8
3.0
2.5
2.6
2.7
3.1
R
G
B
V
OLTS
V
OLTS
09327-
009
Figure 31. AD8147 Sync-On Common-Mode Signals in Single 5 V Application
The transmitted common-mode sync signal magnitudes are
scaled by applying a dc voltage to the SYNC LEVEL input,
referenced to GND. The difference between the voltage applied
to the SYNC LEVEL input and GND sets the peak deviation of
the encoded sync signals about the midsupply, common-mode
voltage. For example, with the SYNC LEVEL input set at 500 mV,
the deviation of the encoded sync pulses about the nominal
midsupply, common-mode voltage is typically ±500 mV. The
are encoded on each color’s midsupply common-mode signal.
In these equations, the weights of the VSYNC and HSYNC signals
are ±1 (+1 for high and 1 for low), and the constant K is equal
to the peak deviation of the encoded sync signals.
Figure 31 shows how the sync signals appear on each common-
mode voltage in a single 5 V supply application when the voltage
applied to the SYNC LEVEL input is 500 mV, which is the
typical setting for most applications.
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