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參數(shù)資料
| 型號： | AD8153ACPZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 11/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SW MUX/DEMUX SGL BUFF 32LFCSP |
| 標準包裝： | 1 |
| 系列： | XStream™ |
| 應用： | 2:1 多路復用器/1:2 多路分配器 |
| 接口： | I²C |
| 電源電壓： | 3 V ~ 3.6 V |
| 封裝/外殼： | 32-VFQFN 裸露焊盤，CSP |
| 供應商設備封裝： | 32-LFCSP-EP（5x5） |
| 包裝： | 托盤 |
| 安裝類型： | 表面貼裝 |
| 產(chǎn)品目錄頁面： | 801 (CN2011-ZH PDF) |
| 配用： | AD8153-EVALZ-ND - BOARD EVALUATION FOR AD8153 |
AD8153
Rev. 0 | Page 19 of 24
PCB DESIGN GUIDELINES
Proper RF PCB design techniques must be used for optimal
performance.
Power Supply Connections and Ground Planes
Use of one low impedance ground plane is recommended. The
VEE pins should be soldered directly to the ground plane to
reduce series inductance. If the ground plane is an internal
plane and connections to the ground plane are made through
vias, multiple vias can be used in parallel to reduce the series
inductance. The exposed pad should be connected to the VEE
plane using plugged vias so that solder does not leak through
the vias during reflow.
Use of a 10 μF electrolytic capacitor between VCC and VEE is
recommended at the location where the 3.3 V supply enters the
PCB. It is recommended that 0.1 μF and 1 nF ceramic chip
capacitors be placed in parallel at each supply pin for high
frequency power supply decoupling. When using 0.1 μF and 1 nF
ceramic chip capacitors, they should be placed between the IC
power supply pins (VCC, VTTI, VTTO) and VEE, as close as
possible to the supply pins.
By using adjacent power supply and GND planes, excellent high
frequency decoupling can be realized by using close spacing
between the planes. This capacitance is given by
CPLANE = 0.88εr A/d (pF)
where:
ε
r
is the dielectric constant of the PCB material.
A is the area of the overlap of power and GND planes (cm2).
d is the separation between planes (mm).
For FR4, εr = 4.4 and 0.25 mm spacing, C ~15 pF/cm2.
Transmission Lines
Use of 50 Ω transmission lines is required for all high frequency
input and output signals to minimize reflections. It is also
necessary for the high speed pairs of differential input traces to
be matched in length, as well as the high speed pairs of differential
output traces, to avoid skew between the differential traces.
Soldering Guidelines for Chip Scale Package
The lands on the 32-lead LFCSP are rectangular. The printed
circuit board pad for these should be 0.1 mm longer than the
package land length and 0.05 mm wider than the package land
width. The land should be centered on the pad. This ensures
that the solder joint size is maximized. The bottom of the chip
scale package has a central exposed pad. The pad on the printed
circuit board should be at least as large as this exposed pad. The
user must connect the exposed pad to VEE using plugged vias
so that solder does not leak through the vias during reflow. This
ensures a solid connection from the exposed pad to VEE.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD8153ACPZ-RL7 | 功能描述:IC SW MUX/DEMUX SGL BUFF 32LFCSP RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:XStream™ 特色產(chǎn)品:NXP - I2C Interface 標準包裝:1 系列:- 應用:2 通道 I²C 多路復用器 接口:I²C，SM 總線 電源電壓:2.3 V ~ 5.5 V 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:16-TSSOP 包裝:剪切帶 (CT) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:825 (CN2011-ZH PDF) 其它名稱:568-1854-1 |
| AD8153-EVALZ | 功能描述:BOARD EVALUATION FOR AD8153 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:XStream™ 標準包裝:1 系列:PCI Express® (PCIe) 主要目的:接口，收發(fā)器，PCI Express 嵌入式:- 已用 IC / 零件:DS80PCI800 主要屬性:- 次要屬性:- 已供物品:板 |
| AD8153XCPZ | 制造商:Analog Devices 功能描述:SINGLE-LANE 3.2GBPS 2:1 MUX / 1:2 DEMUX SWITCH 32-PIN LFCSP - Bulk |
| AD8155 | 制造商:AD 制造商全稱:Analog Devices 功能描述:6.5 Gbps Dual Buffer Mux/Demux |
| AD8155ACPZ | 功能描述:IC MUX/DEMUX DUAL BUFFER 64LFCSP RoHS:是 類別:集成電路 (IC) >> 接口 - 模擬開關，多路復用器，多路分解器 系列:XStream™ 其它有關文件:STG4159 View All Specifications 標準包裝:5,000 系列:- 功能:開關 電路:1 x SPDT 導通狀態(tài)電阻:300 毫歐 電壓電源:雙電源 電壓 - 電源，單路/雙路(±):±1.65 V ~ 4.8 V 電流 - 電源:50nA 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:7-WFBGA，F(xiàn)CBGA 供應商設備封裝:7-覆晶 包裝:帶卷 (TR) |
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