參數(shù)資料
型號(hào): AD8330ACPZ-R7
廠商: Analog Devices Inc
文件頁(yè)數(shù): 1/32頁(yè)
文件大小: 0K
描述: IC AMP VGA 150MHZ LN LP 16LFCSP
標(biāo)準(zhǔn)包裝: 1
放大器類(lèi)型: 可變?cè)鲆?br>
電路數(shù): 1
輸出類(lèi)型: 差分,滿(mǎn)擺幅
轉(zhuǎn)換速率: 1500 V/µs
-3db帶寬: 150MHz
電流 - 輸入偏壓: 100nA
電流 - 電源: 20mA
電壓 - 電源,單路/雙路(±): 2.7 V ~ 6 V
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 16-VFQFN 裸露焊盤(pán),CSP
供應(yīng)商設(shè)備封裝: 16-LFCSP-VQ
包裝: 標(biāo)準(zhǔn)包裝
產(chǎn)品目錄頁(yè)面: 775 (CN2011-ZH PDF)
配用: AD8330-EVALZ-ND - BOARD EVAL FOR AD8330
其它名稱(chēng): AD8330ACPZ-R7DKR
Low Cost, DC to 150 MHz
Variable Gain Amplifier
Data Sheet
Rev. F
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
2003–2012 Analog Devices, Inc. All rights reserved.
FEATURES
Fully differential signal path, also used
with single-sided signals
Inputs from 0.3 mV to 1 V rms, rail-to-rail outputs
Differential R
IN = 1 k; ROUT (each output) 75
Automatic offset compensation (optional)
Linear-in-dB and linear-in-magnitude gain modes
0 dB to 50 dB, for 0 V < V
DBS < 1.5 V (30 mV/dB)
Inverted gain mode: 50 dB to 0 dB at 30 mV/dB
×0.03 to ×10 nominal gain for 15 mV < V
MAG < 5 V
Constant bandwidth: 150 MHz at all gains
Low noise: 5 nV/√Hz typical at maximum gain
Low distortion: ≤62 dBc typical
Low power: 20 mA typical at V
S of 2.7 V to 6 V
Available in a space-saving, 3 mm × 3 mm LFCSP package
APPLICATIONS
Pre-ADC signal conditioning
75 cable driving adjust
AGC amplifiers
FUNCTIONAL BLOCK DIAGRAM
OPHI
CMOP
OPLO
VMAG
ENBL
BIAS AND VREF
VGA CORE
OUTPUT
CONTROL
GAIN INTERFACE
OUTPUT
STAGES
CM AND
OFFSET
CONTROL
OFST CNTR
INHI
INLO
MODE
VDBS
COMM
CMGN
03217-
101
Figure 1.
GENERAL DESCRIPTION
The AD8330 is a wideband variable gain amplifier for applications
requiring a fully differential signal path, low noise, well-defined
gain, and moderately low distortion, from dc to 150 MHz. The
input pins can also be driven from a single-ended source. The
peak differential input is ±2 V, allowing sine wave operation at
1 V rms with generous headroom. The output pins can drive
single-sided loads essentially rail-to-rail. The differential output
resistance is 150 . The output swing is a linear function of the
voltage applied to the VMAG pin that internally defaults to 0.5 V,
providing a peak output of ±2 V. This can be raised to 10 V p-p,
limited by the supply voltage.
The basic gain function is linear-in-dB, controlled by the voltage
applied to Pin VDBS. The gain ranges from 0 dB to 50 dB for
control voltages between 0 V and 1.5 V—a slope of 30 mV/dB.
The gain linearity is typically within ±0.1 dB. By changing the
logic level on Pin MODE, the gain decreases over the same range,
with an opposite slope. A second gain control port is provided at
the VMAG pin and allows the user to vary the numeric gain from
a factor of 0.03 to 10. All the parameters of the AD8330 have low
sensitivities to temperature and supply voltages.
Using VMAG, the basic 0 dB to 50 dB range can be reposi-
tioned to any value from 20 dB higher (that is, 20 dB to 70 dB)
to at least 30 dB lower (that is, –30 dB to +20 dB) to suit the
application, thereby providing an unprecedented gain range of
over 100 dB. A unique aspect of the AD8330 is that its bandwidth
and pulse response are essentially constant for all gains, over both
the basic 50 dB linear-in-dB range, but also when using the
linear-in-magnitude function. The exceptional stability of the
HF response over the gain range is of particular value in those
VGA applications where it is essential to maintain accurate gain
law-conformance at high frequencies.
An external capacitor at Pin OFST sets the high-pass corner of
an offset reduction loop, whose frequency can be as low as 5 Hz.
When this pin is grounded, the signal path becomes dc-coupled.
When used to drive an ADC, an external common-mode control
voltage at Pin CNTR can be driven to within 0.5 V of either ground
or VS to accommodate a wide variety of requirements. By default,
the two outputs are positioned at the midpoint of the supply, VS/2.
Other features, such as two levels of power-down (fully off and a
hibernate mode), further extend the practical value of this excep-
tionally versatile VGA.
The AD8330 is available in 16-lead LFCSP and 16-lead QSOP
packages and is specified for operation from 40°C to +85°C.
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