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| 型號： | AD8370AREZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 11/28頁 |
| 文件大小： | 0K |
| 描述： | IC AMP VGA DIFF LN 16TSSOP |
| 產(chǎn)品培訓(xùn)模塊： | Differential Circuit Design Techniques for Communication Applications |
| 標(biāo)準(zhǔn)包裝： | 96 |
| 放大器類型： | 可變增益 |
| 電路數(shù)： | 1 |
| 輸出類型： | 差分 |
| 轉(zhuǎn)換速率： | 5750 V/ns |
| -3db帶寬： | 750MHz |
| 電流 - 輸入偏壓： | 400pA |
| 電流 - 電源： | 79mA |
| 電壓 - 電源，單路/雙路(±)： | 3 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-TSSOP（0.173"，4.40mm）裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 16-TSSOP-EP |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 775 (CN2011-ZH PDF) |
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Data Sheet
AD8370
Rev. B | Page 19 of 28
–10
–8
–6
–4
–2
0
2
4
6
8
10
NORMALIZED
RESPONSE
(dB)
1
10
100
1k
10k
100k
1M
10M
100M
1G
FREQUENCY (Hz)
03692-051
AD8370 WITH
AD8138 SINGLE
+5V SUPPLY
AD8370
USING DUAL
±2.5V SUPPLY
Figure 53. Normalized Frequency Response of the Two Solutions in
ADC INTERFACING
Although the AD8370 is designed to provide a 100 output
source impedance, the device is capable of driving a variety
of loads while maintaining reasonable gain and distortion
performance. A common application for the AD8370 is ADC
driving in IF sampling receivers and broadband wide dynamic
range digitizers. The wide gain adjustment range allows the use
of lower resolution ADCs. Figure 54 illustrates a typical ADC
interface network.
03692-052
AD8370
VOCM
ROP
100
CAC
ZS
RIP
VIN
ROP
CAC
ZS
RIP
RT
ZP
ZIN
ADC
Figure 54. Generic ADC Interface
Many factors need to be considered before defining component
values used in the interface network, such as the desired frequency
range of operation, the input swing, and input impedance of the
ADC. AC coupling capacitors, CAC, should be used to block any
potential dc offsets present at the AD8370 outputs, which would
otherwise consume the available low-end range of the ADC.
The CAC capacitors should be large enough so that they present
negligible reactance over the intended frequency range of
operation. The VOCM pin may serve as an external reference
for ADCs that do not include an on-board reference. In either
case, it is suggested that the VOCM pin be decoupled to ground
through a moderately large bypassing capacitor (1 nF to 10 nF)
to help minimize wideband noise pick-up.
Often it is wise to include input and output parasitic suppression
resistors, RIP and ROP. Parasitic suppressing resistors help to
prevent resonant effects that occur as a result of internal bond-
wire inductance, pad to substrate capacitance, and stray
capacitance of the printed circuit board trace artwork. If
omitted, undesirable settling characteristics may be observed.
Typically, only 10 to 25 of series resistance is all that is
needed to help dampen resonant effects. Considering that most
ADCs present a relatively high input impedance, very little
signal is lost across the RIP and ROP series resistors.
Depending on the input impedance presented by the input
system of the ADC, it may be desirable to terminate the ADC
input down to a lower impedance by using a terminating
exhibits greater peaking when driving very light loads. In
addition, the terminating resistor helps to better define the
input impedance at the ADC input. Any part-to-part variability
of ADC input impedance is reduced when shunting down the
ADC inputs by using a moderate tolerance terminating resistor
(typically a 1% value is acceptable).
After defining reasonable values for coupling capacitors,
suppressing resistors, and the terminating resistor, it is time to
design the intermediate filter network. The example in
Figure 54 suggests a second-order, low-pass filter network
comprised of series inductors and a shunt capacitor. The order
and type of filter network used depends on the desired high
frequency rejection required for the ADC interface, as well as
on pass-band ripple and group delay. In some situations, the
signal spectra may already be sufficiently band-limited such
that no additional filter network is necessary, in which case ZS
would simply be a short and ZP would be an open. In other
situations, it may be necessary to have a rather high-order
antialiasing filter to help minimize unwanted high frequency
spectra from being aliased down into the first Nyquist zone of
the ADC.
To properly design the filter network, it is necessary to consider
the overall source and load impedance presented by the AD8370
and ADC input, including the additional resistive contribution
of suppression and terminating resistors. The filter design can
then be handled by using a single-ended equivalent circuit, as
shown in Figure 55. A variety of references that address filter
synthesis are available. Most provide tables for various filter
types and orders, indicating the normalized inductor and
capacitor values for a 1 Hz cutoff frequency and 1 load. After
scaling the normalized prototype element values by the actual
desired cut-off frequency and load impedance, it is simply a
matter of splitting series element reactances in half to realize the
final balanced filter network component values.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD8370AREZ | 制造商:Analog Devices 功能描述:IC VARIABLE GAIN AMP 750MHZ TSSOP-16 制造商:Analog Devices 功能描述:IC, VARIABLE GAIN AMP, 750MHZ, TSSOP-16 |
| AD8370AREZ1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:LF to 750 MHz, Digitally Controlled VGA |
| AD8370AREZ-RL7 | 功能描述:IC AMP VGA DIFF LN 16TSSOP RoHS:是 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 標(biāo)準(zhǔn)包裝:150 系列:- 放大器類型:音頻 電路數(shù):2 輸出類型:- 轉(zhuǎn)換速率:5 V/µs 增益帶寬積:12MHz -3db帶寬:- 電流 - 輸入偏壓:100nA 電壓 - 輸入偏移:500µV 電流 - 電源:6mA 電流 - 輸出 / 通道:50mA 電壓 - 電源，單路/雙路(±):4 V ~ 32 V，±2 V ~ 16 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:8-TSSOP 包裝:管件 |
| AD8370-EVAL | 制造商:Analog Devices 功能描述:AD8370 EVAL BOARD - Bulk |
| AD8370-EVALZ | 制造商:Analog Devices 功能描述:- Bulk |
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