Data Sheet
AD8615/AD8616/AD8618
Rev. F | Page 9 of 20
VO
L
T
A
GE
(2
V
/D
IV
)
VS = ±2.5V
VIN = 2V p-p
AV = 10
TIME (200ns/DIV)
04
64
8-
0
24
Figure 24. Settling Time
V
O
L
T
AG
E
(1
V
/DI
V
)
TIME (1s/DIV)
VS = 2.7V
04
64
8-
02
5
Figure 25. 0.1 Hz to 10 Hz Input Voltage Noise
0
200
400
600
800
1000
1200
1400
NUM
B
E
R
O
F
A
M
P
LIFIE
R
S
–700
–500
–300
–100
100
300
500
700
OFFSET VOLTAGE (V)
VS = 2.7V
TA = 25°C
VCM = 0V TO 2.7V
0
464
8-
02
6
Figure 26. Input Offset Voltage Distribution
–400
–500
–300
–200
–100
0
100
200
300
400
500
IN
PU
T
O
F
S
ET
V
O
L
T
A
G
E
(
V)
0
0.3
0.6
0.9
1.2
1.5
1.8
2.1
2.4
2.7
COMMON-MODE VOLTAGE (V)
VS = 2.7V
TA = 25°C
04
64
8-
02
7
Figure 27. Input Offset Voltage vs. Common-Mode Voltage
(200 Units, Five Wafer Lots Including Process Skews)
–400
–500
–300
–200
–100
0
100
200
300
400
500
IN
PU
T
O
F
SE
T
VO
L
T
A
G
E
(
V
)
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
COMMON-MODE VOLTAGE (V)
VS = 3.5V
TA = 25°C
04
64
8-
02
8
Figure 28. Input Offset Voltage vs. Common-Mode Voltage
(200 Units, Five Wafer Lots Including Process Skews)
SINK
SOURCE
1000
100
10
1
0.1
0.001
0.01
0.1
1
10
ILOAD (mA)
V
SY
–
V
OU
T
(m
V)
VS = ±1.35V
TA = 25°C
04
64
8-
02
9
Figure 29. Output Voltage to Supply Rail vs. Load Current