參數資料
型號: AD8652ARMZ
廠商: Analog Devices Inc
文件頁數: 6/20頁
文件大?。?/td> 0K
描述: IC OPAMP VF CMOS 50MHZ LN 8MSOP
標準包裝: 50
系列: DigiTrim®
放大器類型: 電壓反饋
電路數: 2
輸出類型: 滿擺幅
轉換速率: 41 V/µs
增益帶寬積: 50MHz
電流 - 輸入偏壓: 1pA
電壓 - 輸入偏移: 90µV
電流 - 電源: 17.5mA
電流 - 輸出 / 通道: 40mA
電壓 - 電源,單路/雙路(±): 2.7 V ~ 5.5 V,±1.35 V ~ 2.75 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 8-TSSOP,8-MSOP(0.118",3.00mm 寬)
供應商設備封裝: 8-MSOP
包裝: 管件
AD8651/AD8652
Data Sheet
Rev. D | Page 14 of 20
APPLICATIONS
THEORY OF OPERATION
The AD865x family consists of voltage feedback, rail-to-rail
input and output precision CMOS amplifiers that operate from
2.7 V to 5.5 V of power supply voltage. These amplifiers use
Analog Devices, Inc. DigiTrim technology to achieve a higher
degree of precision than is available from most CMOS
amplifiers. DigiTrim technology, used in a number of Analog
Devices amplifiers, is a method of trimming the offset voltage of
the amplifier after it has been assembled. The advantage of
post-package trimming is that it corrects any offset voltages
caused by the mechanical stresses of assembly.
The AD865x family is available in standard op amp pinouts,
making DigiTrim completely transparent to the user. The input
stage of the amplifiers is a true rail-to-rail architecture, allowing
the input common-mode voltage range of the op amp to extend
to both positive and negative supply rails. The open-loop gain
of the AD865x with a load of 1 k is typically 115 dB.
The AD865x can be used in any precision op amp application.
The amplifiers do not exhibit phase reversal for common-mode
voltages within the power supply. With voltage noise of
4.5 nV/√Hz and –105 dB distortion for 10 kHz, 2 V p-p signals,
the AD865x is a great choice for high resolution data
acquisition systems. Their low noise, sub-pA input bias current,
precision offset, and high speed make them superb preamps for
fast photodiode applications. The speed and output drive
capabilities of the AD865x also make the amplifiers useful in
video applications.
Rail-to-Rail Output Stage
The voltage swing of the output stage is rail-to-rail and is
achieved by using an NMOS and PMOS transistor pair con-
nected in a common source configuration. The maximum
output voltage swing is proportional to the output current, and
larger currents will limit how close the output voltage can get to
the proximity of the output voltage to the supply rail. This is a
characteristic of all rail-to-rail output amplifiers. With 40 mA of
output current, the output voltage can reach within 5 mV of the
positive and negative rails. At light loads of >100 k, the output
swings within ~1 mV of the supplies.
Rail-to-Rail Input Stage
The input common-mode voltage range of the AD865x extends
to both positive and negative supply voltages. This maximizes
the usable voltage range of the amplifier, an important feature
for single-supply and low voltage applications. This rail-to-rail
input range is achieved by using two input differential pairs, one
NMOS and one PMOS, placed in parallel. The NMOS pair is active
at the upper end of the common-mode voltage range, and the
PMOS pair is active at the lower end of the common-mode range.
The NMOS and PMOS input stages are separately trimmed
using DigiTrim to minimize the offset voltage in both differen-
tial pairs. Both NMOS and PMOS input differential pairs are
active in a 500 mV transition region when the input common-
mode voltage is approximately 1.5 V below the positive supply
voltage. A special design technique improves the input offset
voltage in the transition region that traditionally exhibits a
slight VOS variation. As a result, the common-mode rejection
ratio is improved within this transition band. Compared to the
Burr Brown OPA350 amplifier, shown in Figure 53, the
AD865x, shown in Figure 54, exhibits much lower offset voltage
shift across the entire input common-mode range, including the
transition region.
COMMON-MODE VOLTAGE (V)
V
OS
(
V)
0
–600
–200
200
600
400
0
–400
2
1
4
3
5
6
03301-
053
Figure 53. Input Offset Distribution over Common-Mode
Voltage for the OPA350
COMMON-MODE VOLTAGE (V)
V
OS
(
V)
0
–600
–200
200
600
400
0
–400
2
1
4
3
5
6
03301-
061
Figure 54. Input Offset Distribution over Common-Mode
Input Protection for the AD865x
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