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參數(shù)資料
| 型號(hào)： | AD9237BCPZRL7-65 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 9/24頁 |
| 文件大小： | 0K |
| 描述： | IC ADC 12BIT SGL 65MSPS 32LFCSP |
| 產(chǎn)品變化通告： | Product Discontinuance 27/Oct/2011 |
| 標(biāo)準(zhǔn)包裝： | 1,500 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 65M |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 3 |
| 功率耗散（最大）： | 190mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 32-LFCSP-VQ（5x5） |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 2 個(gè)單端，單極；1 個(gè)差分，單極 |
Data Sheet
AD9237
Rev. B | Page 17 of 24
The output common mode of the reference buffer is set to mid-
supply, and the REFT and REFB voltages and input span are
defined as:
REFT = (AVDD + VREF)
REFB = (AVDD VREF)
(
)
Factor
Span
VREF
Factor
Span
REFB
REFT
Span
_
4
_
4
×
=
×
=
The previous equations show that the REFT and REFB voltages
are symmetrical about the midsupply voltage, and the input
span is proportional to the value of the VREF voltage, see Table 7
for more details.
The internal voltage reference can be pin strapped to fixed
values of 0.5 V or 1.0 V, or adjusted within this range as
discussed in the Internal Reference Connection section.
Maximum SNR performance is achieved with the AD9237
set to an input span of 2 V p-p or greater. The relative SNR
degradation is 3 dB when changing from 2 V p-p mode to
1 V p-p mode.
The SHA must be driven from a source that keeps the signal
peaks within the allowable range for the selected reference
voltage. The minimum and maximum common-mode input
levels are defined as:
VCMMIN = VREF/2
VCMMAX = (AVDD + VREF)/2
The minimum common-mode input level allows the AD9237 to
accommodate ground-referenced inputs.
Although optimum performance is achieved with a differential
input, a single-ended source can be driven into VIN+ or VIN–.
In this configuration, one input accepts the signal while the
opposite input should be set to midscale by connecting it to an
appropriate reference. For example, a 2 V p-p signal can be
applied to VIN+ while a 1 V reference is applied to VIN–. The
AD9237 then accepts an input signal varying between 2 V and
0 V. In the single-ended configuration, distortion performance
may degrade significantly as compared to the differential case.
However, the effect is less noticeable at lower input frequencies and
in the lower speed grade models (AD9237-40 and AD9237-20).
Differential Input Configurations
As previously detailed, optimum performance is achieved while
driving the AD9237 in a differential input configuration. For
baseband applications, the AD8351 differential driver provides
excellent performance and a flexible interface to the ADC. The
output common-mode voltage of the AD8351 is easily set to
AVDD/2, and the driver can be configured in a Sallen-Key filter
topology to provide band limiting of the input signal. Figure 36
details a typical configuration using the AD8351.
05455-041
AD8351
AD9237
VIN+
AVDD
AGND
VIN–
–
+
33
1k
0.1
F
0.1
F
33
15pF
0.1
F
0.1
F
1.2k
25
1k
49.9
25
2V p-p
Figure 36. Differential Input Configuration Using the AD8351
At input frequencies in the second Nyquist zone and above, the
performance of most amplifiers is not adequate to achieve the
true performance of the AD9237. This is especially true in IF
undersampling applications where frequencies in the 70 MHz
to 100 MHz range are being sampled. For these applications,
differential transformer coupling is the recommended input
configuration, as shown in Figure 37.
05455-042
AD9237
VIN+
AVDD
AGND
VIN–
33
0.1
F
33
15pF
1k
1k
2V p-p
49.9
Figure 37. Differential Transformer-Coupled Configuration
The signal characteristics must be considered when selecting a
transformer. Most RF transformers saturate at frequencies
below a few MHz, and excessive signal power can cause core
saturation, which leads to distortion.
Single-Ended Input Configuration
A single-ended input can provide adequate performance in
cost-sensitive applications. In this configuration, there is
degradation in SFDR and distortion performance due to the
large input common-mode swing. However, if the source
impedances on each input are matched, there should be little
effect on SNR performance. Figure 38 details a typical single-
ended input configuration.
05455-099
AD9237
VIN+
AVDD
AGND
VIN–
33
0.1
F
33
15pF
1k
1k
1k
1k
25
0.1
F
49.9
2V p-p
Figure 38. Single-Ended Input Configuration
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