參數(shù)資料
型號(hào): AD9239BCPZ-170
廠商: Analog Devices Inc
文件頁數(shù): 1/40頁
文件大?。?/td> 0K
描述: IC ADC 12BIT DUAL 170MSPS 72PIN
標(biāo)準(zhǔn)包裝: 1
位數(shù): 12
采樣率(每秒): 170M
數(shù)據(jù)接口: 串行,SPI?
轉(zhuǎn)換器數(shù)目: 4
功率耗散(最大): 1.22W
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 72-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 72-LFCSP
包裝: 托盤
輸入數(shù)目和類型: 8 個(gè)單端,單極;4 個(gè)差分,單極
Quad, 12-Bit, 170 MSPS/210 MSPS/250 MSPS
Serial Output 1.8 V ADC
Data Sheet
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
2008–2013 Analog Devices, Inc. All rights reserved.
FEATURES
4 ADCs in 1 package
Coded serial digital outputs with ECC per channel
On-chip temperature sensor
95 dB channel-to-channel crosstalk
SNR = 65 dBFS with AIN = 85 MHz at 250 MSPS
SFDR = 77 dBc with AIN = 85 MHz at 250 MSPS
Excellent linearity
DNL = ±0.3 LSB (typical)
INL = ±0.7 LSB (typical)
780 MHz full power analog bandwidth
Power dissipation = 380 mW per channel at 250 MSPS
1.25 V p-p input voltage range, adjustable up to 1.5 V p-p
1.8 V supply operation
Clock duty cycle stabilizer
Serial port interface features
Power-down modes
Digital test pattern enable
Programmable header
Programmable pin functions (PGMx, PDWN)
APPLICATIONS
Communication receivers
Cable head end equipment/M-CMTS
Broadband radios
Wireless infrastructure transceivers
Radar/military-aerospace subsystems
Test equipment
FUNCTIONAL BLOCK DIAGRAM
06980-
001
AD9239
12
CHANNEL D
CHANNEL A
CHANNEL B
CHANNEL C
VIN + A
DOUT + A
DOUT – A
AVDD
PDWN
DRVDD
DRGND
12
VIN + B
VIN – B
DOUT + B
DOUT – B
12
VIN + C
DOUT + C
DOUT – C
12
VIN – A
VCM A
VCM B
VIN – C
VCM C
SCLK
SDI/
SDIO
SDO
CSB
VIN + D
VIN – D
VCM D
TEMPOUT
DOUT + D
DOUT – D
PGM3
PGM2
PGM1
PGM0
RESET
SHA
BUF
PIPELINE
ADC
PIPELINE
ADC
PIPELINE
ADC
PIPELINE
ADC
DAT
A
S
E
RI
AL
IZ
E
R,
E
NCO
DE
R,
AND
CM
L
DRI
V
E
RS
SERIAL
PORT
CLK+ CLK–
DATA RATE
MULTIPLIER
RBIAS
REFERENCE
Figure 1.
GENERAL DESCRIPTION
The AD9239 is a quad, 12-bit, 250 MSPS analog-to-digital
converter (ADC) with an on-chip temperature sensor and a
high speed serial interface. It is designed to support digitizing
high frequency, wide dynamic range signals with an input
bandwidth up to 780 MHz. The output data are serialized and
presented in packet format, consisting of channel-specific
information, coded samples, and error correction code.
The ADC requires a single 1.8 V power supply and the input
clock may be driven differentially with a sine wave, LVPECL,
TTL, or LVDS. A clock duty cycle stabilizer allows high
performance at full speed with a wide range of clock duty
cycles. The on-chip reference eliminates the need for external
decoupling and can be adjusted by means of SPI control.
Various power-down and standby modes are supported. The
ADC typically consumes 145 mW per channel with the digital
link still in operation when standby operation is enabled.
Fabricated on an advanced CMOS process, the AD9239 is avail-
able in a Pb-free/RoHS-compliant, 72-lead LFCSP package. It is
specified over the industrial temperature range of 40°C to +85°C.
PRODUCT HIGHLIGHTS
1. Four ADCs are contained in a small, space-saving package.
2. An on-chip PLL allows users to provide a single ADC
sampling clock, and the PLL distributes and multiplies up
to produce the corresponding data rate clock.
3. Coded data rate supports up to 4.0 Gbps per channel.
Coding includes scrambling to ensure proper dc common
mode, embedded clock, and error correction.
4. The AD9239 operates from a single 1.8 V power supply.
5. Flexible synchronization schemes and programmable
mode pins.
6. On-chip temperature sensor.
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