- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄1986 > AD9241ASZRL (Analog Devices Inc)IC ADC 14BIT SGL 1.25MSPS 44MQFP PDF資料下載
參數(shù)資料
| 型號： | AD9241ASZRL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 5/24頁 |
| 文件大小： | 0K |
| 描述： | IC ADC 14BIT SGL 1.25MSPS 44MQFP |
| 標(biāo)準(zhǔn)包裝： | 800 |
| 位數(shù)： | 14 |
| 采樣率（每秒）： | 1.25M |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 7 |
| 功率耗散（最大）： | 85mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-QFP |
| 供應(yīng)商設(shè)備封裝： | 44-MQFP（10x10） |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 2 個單端，單極；1 個差分，單極 |
AD9241
REV. 0
–13–
DC Coupling with Op Amps
Applications that require dc coupling can also benefit by driv-
ing the AD9241 differentially. Since the signal swing require-
ments of each input is reduced by a factor of two in the differential
mode, the AD9241 can be configured for a 5 V input span in a
+5 V or
±5 V system. This allows various high performance op
amps specified for +5 V and
±5 V operation to be configured in
various differential driver topologies. The optimum op amp
driver topology depends on whether the common-mode voltage
of the single-ended-input signal requires level-shifting.
Figure 30 shows a cross-coupled differential driver circuit best
suited for systems in which the common-mode signal of the
input is already biased to approximately midsupply (i.e., 2.5 V).
The common-mode voltage of the differential output is set by
the voltage applied to the “+” input of A2. The closed loop
gain of this symmetrical driver can easily be set by RIN and RF.
For more insight into the operation of this cross-coupled driver,
please refer to the AD8042 data sheet.
VINA
VINB
CML
AD9241
1k
0.1F
1k
1k
1k
1k
1k
VIN
VCML–VIN
AVDD/2
VCML+VIN
AD8042
33
33
CF*
*OPTIONAL NOISE/BAND LIMITING CAPACITOR
RF
RIN
A1
A2
Figure 30. Cross-Coupled Differential Driver
The driver circuit shown in Figure 31 is best suited for systems
in which the bipolar input signal is referenced to AGND and
requires proper level shifting. This driver circuit provides the
ability to level-shift the input signal to within the common-
mode range of the AD9241. The two op amps are configured as
matched difference amplifiers, with the input signal applied to
opposing inputs to provide the differential output. The common-
mode offset voltage is applied to the noninverting resistor net-
work that provides the proper level-shifting. The circuit also
employs optional diodes and pull-up resistors that may help
improve the op amps’ distortion performance by reducing their
headroom requirements. Rail-to-rail output amplifiers such as
the AD8042 have sufficient headroom and do not require these
optional components.
VINA
VINB
CML
AD9241
390
390
VIN
VCML–VIN
VCML+VIN
AVDD
390
390
220.2
390
AVDD
390
220.2
390
AD8047
2.5k
33
100
0.1F
1F
0.1F
OP113
33
390
0.1F
Figure 31. Differential Driver with Level-Shifting
SINGLE-ENDED MODE OF OPERATION
The AD9241 can be configured for single-ended operation
using dc or ac coupling. In either case, the input of the A/D
must be driven from an operational amplifier that will not de-
grade the A/D’s performance. Because the A/D operates from a
single supply, it will be necessary to level-shift ground-based
bipolar signals to comply with its input requirements. Both dc
and ac coupling provide this necessary function, but each
method results in different interface issues that may influence
the system design and performance.
DC COUPLING AND INTERFACE ISSUES
Many applications require the analog input signal to be dc
coupled to the AD9241. An operational amplifier can be con-
figured to rescale and level-shift the input signal to make it
compatible with the selected input range of the A/D. The input
range to the A/D should be selected on the basis of system
performance objectives as well as the analog power supply
availability since this will place certain constraints on the op
amp selection.
Many of the new high performance op amps are specified for
only
±5 V operation and have limited input/output swing capa-
bilities. Hence, the selected input range of the AD9241 should
be sensitive to the headroom requirements of the particular op
amp to prevent clipping of the signal. Also, since the output of
a dual supply amplifier can swing below –0.3 V, clamping its
output should be considered in some applications.
In some applications, it may be advantageous to use an op amp
specified for single supply +5 V operation since it will inher-
ently limit its output swing to within the power supply rails.
Rail-to-rail output amplifiers such as the AD8041 allow the
AD9241 to be configured with larger input spans, which im-
proves the noise performance.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD9243ASZRL | IC ADC 14BIT SGL 3MSPS 44MQFP |
| AD9244BSTZRL-65 | IC ADC 14BIT SGL 65MSPS 48LQFP |
| AD9245BCPZRL7-80 | IC ADC 14BIT SGL 80MSPS 32LFCSP |
| AD9246BCPZ-105 | IC ADC 14BIT 105MSPS 48-LFCSP |
| AD9248BCPZRL-65 | IC ADC 14BIT DUAL 65MSPS 64LFCSP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9241EB | 制造商:AD 制造商全稱:Analog Devices 功能描述:Complete 14-Bit, 1.25 MSPS Monolithic A/D Converter |
| AD9241-EB | 制造商:Analog Devices 功能描述:Evaluation Board For AD9241 制造商:Analog Devices 功能描述:EVAL BD FOR AD9241 - Bulk |
| AD9243 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Complete 14-Bit, 3.0 MSPS Monolithic A/D Converter |
| AD9243AS | 制造商:Analog Devices 功能描述:ADC Single Pipelined 3Msps 14-bit Parallel 44-Pin MQFP 制造商:Analog Devices 功能描述:IC 14-BIT ADC |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。