參數(shù)資料
型號: AD9252ABCPZRL7-50
廠商: Analog Devices Inc
文件頁數(shù): 29/52頁
文件大小: 0K
描述: IC ADC 14BIT SRL 50MSPS 64LFCSP
標(biāo)準(zhǔn)包裝: 750
位數(shù): 14
采樣率(每秒): 50M
數(shù)據(jù)接口: 串行,SPI?
轉(zhuǎn)換器數(shù)目: 8
功率耗散(最大): 773mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 64-LFCSP-VQ(9x9)
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 16 個(gè)單端,單極;8 個(gè)差分,單極
Data Sheet
AD9252
Rev. E | Page 35 of 52
ALTERNATIVE ANALOG INPUT DRIVE
CONFIGURATION
The following is a brief description of the alternative analog
input drive configuration using the AD8334 dual VGA. If this
drive option is in use, some components may need to be populated,
in which case all the necessary components are listed in Table 17.
For more details on the AD8334 dual VGA, including how it works
and its optional pin settings, consult the AD8334 data sheet.
To configure the analog input to drive the VGA instead of the
default transformer option, the following components need to
be removed and/or changed.
Remove R102, R115, R128, R141, R161, R162, R163, R164,
R202, R208, R218, R225, R234, R241, R252, R259, T101,
T102, T103, T104, T201, T202, T203, and T204 in the
default analog input path.
Populate R101, R114, R127, R140, R201, R217, R233, and
R251 with 0 resistors in the analog input path.
Populate R152, R153, R154, R155, R156, R157, R158, R159,
R215, R216, R229, R230, R247, R248, R263, R264, C103,
C105, C110, C112, C117, C119, C124, C126, C203, C205,
C210, C212, C217, C219, C224, and C226 with 10 k
resistors to provide an input common-mode level to the
ADC analog inputs.
Populate R105, R113, R118, R124, R131, R137, R151, R160,
R205, R213, R221, R222, R237, R238, R255, and R256 with
0 resistors in the ADC analog input path to connect the
VGA outputs.
Remove R515, R520, R527, R532, R615, R620, R627, and
R632 on the AD8334 analog outputs.
Remove R512, R524, R612, and R624 to set the AD8334
mode and AD8334 HILO pin low. Some applications may
require this to be different. Consult the AD8334 data sheet
for more information on these functions.
In this configuration, L505 to L520 and L605 to L620 are populated
with 0 resistors to allow signal connection and use of a filter if
additional requirements are necessary.
In this example, a 16 MHz, two-pole low-pass filter was applied
to the AD8334 outputs. The following components need to be
removed and/or changed:
Remove L507, L508, L511, L512, L515, L516, L519, L520,
L607, L608, L611, L612, L615, L616, L619, and L620 on the
AD8334 analog outputs.
Populate L507, L508, L511, L512, L515, L516, L519, L520,
L607, L608, L611, L612, L615, L616, L619, and L620 with
680 nH inductors.
Populate C543, C547, C551, C555, C643, C647, C651, and
C655 with a 68 pF capacitor.
68pF
680nH
06296-
083
Figure 60. Example Filter Configured for16 MHz, Two-Pole Low-Pass Filter
0
–120
–100
–80
–60
–40
–20
0
5.0
7.5
2.5
10.0
15.0
17.5
12.5
20.0
22.5
25.0
A
MPL
IT
U
D
E
(d
B
F
S)
FREQUENCY (MHz)
06296-
084
fSAMPLE = 50MSPS
AIN = 3.5MHz
AD8334 = MAX GAIN SETTING
Figure 61. AD9252 FFT Example Results Using
16 MHz, Two-Pole Low-Pass Filter Applied to the AD8334 Outputs
(Analog Input Signal = 1.03 dBFS, SNR = 60.2 dBc, SFDR = 66.23 dBc)
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