參數(shù)資料
型號(hào)： AD9266BCPZ-20
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 18/32頁(yè)
文件大小： 0K
描述： IC ADC 16BIT 20MSPS 32LFCSP
標(biāo)準(zhǔn)包裝： 1
位數(shù)： 16
采樣率（每秒）： 20M
數(shù)據(jù)接口： 串行，SPI?
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 63mW
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 85°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 32-WFQFN 裸露焊盤(pán)，CSP
供應(yīng)商設(shè)備封裝： 32-LFCSP-WQ（5x5）
包裝： 托盤(pán)
輸入數(shù)目和類(lèi)型： 2 個(gè)單端，單極；1 個(gè)差分，單極
Data Sheet
AD9266
Rev. A | Page 25 of 32
SERIAL PORT INTERFACE (SPI)
The AD9266 serial port interface (SPI) allows the user to con-
figure the converter for specific functions or operations through
a structured register space provided inside the ADC. The SPI gives
the user added flexibility and customization, depending on the
application. Addresses are accessed via the serial port and can
be written to or read from via the port. Memory is organized
into bytes that can be further divided into fields, which are
documented in the Memory Map section. For more detailed
operational information, see the AN-877 Application Note,
Interfacing to High Speed ADCs via SPI.
CONFIGURATION USING THE SPI
Three pins define the SPI of this ADC: SCLK, SDIO, and CSB
(see Table 13). The SCLK (a serial clock) is used to synchronize
the read and write data presented from and to the ADC. SDIO
(serial data input/output) is a dual-purpose pin that allows data to
be sent and read from the internal ADC memory map registers.
The CSB (chip select bar) is an active-low control that enables
or disables the read and write cycles.
Table 13. Serial Port Interface Pins
Pin
Function
SCLK
Serial clock. The serial shift clock input, which is used to
synchronize serial interface reads and writes.
SDIO
Serial data input/output. A dual-purpose pin that
typically serves as an input or an output, depending on
the instruction being sent and the relative position in the
timing frame.
CSB
Chip select bar. An active-low control that gates the read
and write cycles.
The falling edge of CSB, in conjunction with the rising edge of
SCLK, determines the start of the framing. An example of the
serial timing and its definitions can be found in Figure 54 and
Other modes involving the CSB pin are available. CSB can be
held low indefinitely, which permanently enables the device;
this is called streaming. CSB can stall high between bytes to
allow for additional external timing. When CSB is tied high,
SPI functions are placed in high impedance mode. This mode
turns on any SPI pin secondary functions.
During an instruction phase, a 16-bit instruction is transmitted.
Data follows the instruction phase, and its length is determined
by the W0 and W1 bits, as shown in Figure 54.
All data is composed of 8-bit words. The first bit of the first byte in
a multibyte serial data transfer frame indicates whether a read
command or a write command is issued. This allows the serial
data input/output (SDIO) pin to change direction from an input
to an output at the appropriate point in the serial frame.
In addition to word length, the instruction phase determines
whether the serial frame is a read or write operation, allowing
the serial port to be used both to program the chip and to read
the contents of the on-chip memory. If the instruction is a readback
operation, performing a readback causes the serial data input/
output (SDIO) pin to change direction from an input to an output
at the appropriate point in the serial frame.
Data can be sent in MSB-first mode or in LSB-first mode. MSB
first is the default on power-up and can be changed via the SPI
port configuration register. For more information about this
and other features, see the AN-877 Application Note, Interfacing
to High Speed ADCs via SPI.
DON’T CARE
SDIO
SCLK
CSB
tS
tDH
tCLK
tDS
tH
R/W
W1
W0
A12
A11
A10
A9
A8
A7
D5
D4
D3
D2
D1
D0
tLOW
tHIGH
08678-
023
Figure 54. Serial Port Interface Timing Diagram
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