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參數(shù)資料
| 型號： | AD9410BSVZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 3/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 10BIT 210MSPS 80-TQFP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 位數(shù)： | 10 |
| 采樣率（每秒）： | 210M |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 2.4W |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 80-TQFP 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 80-TQFP-EP（14x14） |
| 包裝： | 托盤 |
| 輸入數(shù)目和類型： | 1 個差分，單極 |
AD9410
Rev. A | Page 11 of 20
Signal-to-Noise-and-Distortion (SINAD)
The ratio of the rms signal amplitude (set 0.5 dB below full
scale) to the rms value of the sum of all other spectral
components, including harmonics, but excluding dc.
Signal-to-Noise Ratio (Without Harmonics)
The ratio of the rms signal amplitude (set at 0.5 dB below full
scale) to the rms value of the sum of all other spectral
components, excluding the first five harmonics and dc.
Spurious-Free Dynamic Range (SFDR)
The ratio of the rms signal amplitude to the rms value of the
peak spurious spectral component. The peak spurious
component may or may not be a harmonic. It may be reported
in dBc (that is, degrades as signal level is lowered) or dBFS
(always related back to converter full scale).
Transient Response Time
Transient response time is defined as the time it takes for the
ADC to reacquire the analog input after a transient from 10%
above negative full scale to 10% below positive full scale.
Two-Tone Intermodulation Distortion Rejection
The ratio of the rms value of either input tone to the rms
value of the worst third-order intermodulation product;
reported in dBc.
Two-Tone SFDR
The ratio of the rms value of either input tone to the rms value
of the peak spurious component. The peak spurious component
may or may not be an IMD product. May be reported in dBc
(that is, degrades as signal level is lowered) or in dBFS (always
related back to converter full scale).
Worst Other Spur
The ratio of the rms signal amplitude to the rms value of the
worst spurious component (excluding the second and third
harmonic) reported in dBc.
Table 7. Output Coding (VREF = 2.5 V)
Step
AIN AIN
Digital Outputs Offset Binary
Digital Outputs Twos Complement
ORA, ORB
>+0.768
11 1111 1111
01 1111 1111
1
1023
+0.768
11 1111 1111
01 1111 1111
0
513
+0.0015
10 0000 0001
00 0000 0001
0
512
0.0
10 0000 0000
00 0000 0000
0
511
–0.0015
01 1111 1111
11 1111 1111
0
0
–0.768
00 0000 0000
10 0000 0000
0
< –0.768
00 0000 0000
10 0000 0000
1
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| AD9411BSVZ-170 | 功能描述:IC ADC 10BIT 170MSPS 100TQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 位數(shù):12 采樣率（每秒）:3M 數(shù)據(jù)接口:- 轉(zhuǎn)換器數(shù)目:- 功率耗散（最大）:- 電壓電源:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 供應(yīng)商設(shè)備封裝:SOT-23-6 包裝:帶卷 (TR) 輸入數(shù)目和類型:- |
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