- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄9158 > AD9517-4ABCPZ (Analog Devices Inc)IC CLOCK GEN 1.8GHZ VCO 48LFCSP PDF資料下載
參數(shù)資料
| 型號： | AD9517-4ABCPZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 34/80頁 |
| 文件大小： | 0K |
| 描述： | IC CLOCK GEN 1.8GHZ VCO 48LFCSP |
| 設計資源： | High Performance, Dual Channel IF Sampling Receiver (CN0140) |
| 標準包裝： | 1 |
| 類型： | 時鐘發(fā)生器，扇出配送 |
| PLL： | 是 |
| 輸入： | CMOS，LVDS，LVPECL |
| 輸出： | CMOS，LVDS，LVPECL |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:12 |
| 差分 - 輸入:輸出： | 是/是 |
| 頻率 - 最大： | 1.8GHz |
| 除法器/乘法器： | 是/無 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-VFQFN 裸露焊盤，CSP |
| 供應商設備封裝： | 48-LFCSP-VQ（7x7） |
| 包裝： | 托盤 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁當前第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁
AD9517-4
Data Sheet
Rev. E | Page 4 of 80
SPECIFICATIONS
Typical is given for VS = VS_LVPECL = 3.3 V ± 5%; VS ≤ VCP ≤ 5.25 V; TA = 25°C; RSET = 4.12 k; CPRSET = 5.1 k, unless otherwise noted.
Minimum and maximum values are given over full VS and TA (40°C to +85°C) variation.
POWER SUPPLY REQUIREMENTS
Table 1.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
VS
3.135
3.3
3.465
V
3.3 V ± 5%
VS_LVPECL
2.375
VS
V
Nominally 2.5 V to 3.3 V ± 5%
VCP
VS
5.25
V
Nominally 3.3 V to 5.0 V ± 5%
RSET Pin Resistor
4.12
k
Sets internal biasing currents; connect to ground
CPRSET Pin Resistor
2.7
5.1
10
k
Sets internal CP current range, nominally 4.8 mA (CP_lsb = 600 A);
actual current can be calculated by CP_lsb = 3.06/CPRSET; connect
to ground
BYPASS Pin Capacitor
220
nF
Bypass for internal LDO regulator; necessary for LDO stability;
connect to ground
PLL CHARACTERISTICS
Table 2.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
VCO (ON-CHIP)
Frequency Range
1450
1800
MHz
See
VCO Gain (KVCO)
50
MHz/V
See
Tuning Voltage (VT)
0.5
VCP
0.5
V
VCP ≤ VS when using internal VCO; outside of this range,
the CP spurs may increase due to CP up/down mismatch
Frequency Pushing (Open Loop)
1
MHz/V
Phase Noise at 100 kHz Offset
109
dBc/Hz
f = 1625 MHz
Phase Noise at 1 MHz Offset
128
dBc/Hz
f = 1625 MHz
REFERENCE INPUTS
Differential Mode (REFIN, REFIN)
Differential mode (can accommodate single-ended input by ac
grounding undriven input)
Input Frequency
0
250
MHz
Frequencies below about 1 MHz should be dc-coupled; be careful
to match VCM (self-bias voltage)
Input Sensitivity
250
mV p-p
PLL figure of merit (FOM) increases with increasing slew rate
(see
Figure 14); the input sensitivity is sufficient for ac-coupled
LVDS and LVPECL signals
Self-Bias Voltage, REFIN
1.35
1.60
1.75
V
Self-bias voltage of REFIN1
Self-Bias Voltage, REFIN
1.30
1.50
1.60
V
Self-bias voltage of REFIN1
Input Resistance, REFIN
4.0
4.8
5.9
k
Self-biased1
Input Resistance, REFIN
4.4
5.3
6.4
k
Self-biased1
Dual Single-Ended Mode (REF1, REF2)
Two single-ended CMOS-compatible inputs
Input Frequency (AC-Coupled)
20
250
MHz
Slew rate > 50 V/s
Input Frequency (DC-Coupled)
0
250
MHz
Slew rate > 50 V/s; CMOS levels
Input Sensitivity (AC-Coupled)
0.8
V p-p
Should not exceed VS p-p
Input Logic High
2.0
V
Input Logic Low
0.8
V
Input Current
100
+100
A
Pulse Width High/Low
1.8
ns
This value determines the allowable input duty cycle and is the
amount of time that a square wave is high/low
Input Capacitance
2
pF
Each pin, REFIN/REFIN (REF1/REF2)
PHASE/FREQUENCY DETECTOR (PFD)
PFD Input Frequency
100
MHz
Antibacklash pulse width = 1.3 ns, 2.9 ns
45
MHz
Antibacklash pulse width = 6.0 ns
Antibacklash Pulse Width
1.3
ns
Register 0x017[1:0] = 01b
2.9
ns
Register 0x017[1:0] = 00b; Register 0x017[1:0] = 11b
6.0
ns
Register 0x017[1:0] = 10b
相關PDF資料 |
PDF描述 |
|---|---|
| V110A48H300BF | CONVERTER MOD DC/DC 48V 300W |
| AD9517-2ABCPZ | IC CLOCK GEN 2.2GHZ VCO 48LFCSP |
| AD9517-3ABCPZ | IC CLOCK GEN 2.0GHZ VCO 48LFCSP |
| AD9517-1ABCPZ | IC CLOCK GEN 2.5GHZ VCO 48LFCSP |
| V110A48H300BL2 | CONVERTER MOD DC/DC 48V 300W |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD9517-4ABCPZ | 制造商:Analog Devices 功能描述:CLOCK GENERATOR 1.8GHZ LFCSP |
| AD9517-4ABCPZ-RL7 | 功能描述:IC CLOCK GEN 1.8GHZ VCO 48LFCSP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標準包裝:2,000 系列:- 類型:PLL 時鐘發(fā)生器 PLL:帶旁路 輸入:LVCMOS，LVPECL 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:2:11 差分 - 輸入:輸出:是/無 頻率 - 最大:240MHz 除法器/乘法器:是/無 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:32-LQFP 供應商設備封裝:32-TQFP（7x7） 包裝:帶卷 (TR) |
| AD9517-4APCBZ | 制造商:AD 制造商全稱:Analog Devices 功能描述:12-Output Clock Generator with Integrated 1.6 GHz VCO |
| AD9517-4BCPZ | 制造商:Analog Devices 功能描述: 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述:IC CLOCK GENERATOR 1.8GHZ LFCSP-48 制造商:Analog Devices 功能描述:IC, CLOCK GENERATOR, 1.8GHZ, LFCSP-48, Clock IC Type:Clock Generator, Frequency: |
| AD9517-4BCPZ-REEL7 | 制造商:Analog Devices 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復。