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參數(shù)資料
| 型號： | AD9600ABCPZ-150 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 1/72頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 10BIT 150MSPS 64LFCSP |
| 標準包裝： | 1 |
| 位數(shù)： | 10 |
| 采樣率（每秒）： | 150M |
| 數(shù)據(jù)接口： | 串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 功率耗散（最大）： | 890mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-VFQFN 裸露焊盤，CSP |
| 供應商設備封裝： | 64-LFCSP-VQ（9x9） |
| 包裝： | 托盤 |
| 輸入數(shù)目和類型： | 4 個單端，單極；2 個差分，單極 |
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10-Bit, 105 MSPS/125 MSPS/150 MSPS,
1.8 V Dual Analog-to-Digital Converter
AD9600
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringementsof patentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
2007–2009 Analog Devices, Inc. All rights reserved.
FEATURES
SNR = 60.6 dBc (61.6 dBFS) to 70 MHz at 150 MSPS
SFDR = 81 dBc to 70 MHz at 150 MSPS
Low power: 825 mW at 150 MSPS
1.8 V analog supply operation
1.8 V to 3.3 V CMOS output supply or 1.8 V LVDS supply
Integer 1 to 8 input clock divider
Intermediate frequency (IF) sampling frequencies up to 450 MHz
Internal analog-to-digital converter (ADC) voltage reference
Integrated ADC sample-and-hold inputs
Flexible analog input: 1 V p-p to 2 V p-p range
Differential analog inputs with 650 MHz bandwidth
ADC clock duty cycle stabilizer
95 dB channel isolation/crosstalk
Serial port control
User-configurable built-in self-test (BIST) capability
Energy-saving power-down modes
Integrated receive features
Fast detect/threshold bits
Composite signal monitor
APPLICATIONS
Point-to-point radio receivers (GPSK, QAM)
Diversity radio systems
I/Q demodulation systems
Smart antenna systems
Digital predistortion
General-purpose software radios
Broadband data applications
Data acquisition
Nondestructive testing
PRODUCT HIGHLIGHTS
1.
Integrated dual, 10-bit, 150 MSPS/125 MSPS/105 MSPS ADC.
2.
Fast overrange detect and signal monitor with serial output.
3.
Signal monitor block with dedicated serial output mode.
4.
Proprietary differential input maintains excellent SNR
performance for input frequencies up to 450 MHz.
5.
The AD9600 operates from a single 1.8 V supply and
features a separate digital output driver supply to
accommodate 1.8 V to 3.3 V logic families.
6.
A standard serial port interface supports various product
features and functions, such as data formatting (offset
binary, twos complement, or gray coding), enabling the
clock DCS, power-down mode, and voltage reference mode.
7.
The AD9600 is pin compatible with the AD9627-11, AD9627,
and AD9640, allowing a simple migration from 10 bits to
11 bits, 12 bits, or 14 bits.
FUNCTIONAL BLOCK DIAGRAM
0
69
09
-00
1
SIGNAL
MONITOR
SHA
ADC
CM
O
S
/L
V
DS
O
U
TP
U
T
B
U
F
FE
R
D9A
D0A
VIN + A
VIN – A
DRVDD
DVDD
AVDD
CSB
SCLK/
DFS
SPI
PROGRAMMING DATA
SDIO/
DCS
FD[0:3]A
FD BITS/THRESHOLD
DETECT
SHA
ADC
CM
O
S
/L
V
DS
O
UT
P
UT
BU
F
E
R
D0B
D9B
VIN + B
VIN – B
DCOA
DCOB
CLK+
CLK–
DCO
GENERATION
DUTY CYCLE
STABLIZER
DIVIDE 1
TO 8
DRGND
SYNC
AGND
SMI
SDO/
OEB
SMI
SCLK/
PDWN
SERIAL MONITOR
DATA
SMI
SDFS
SERIAL MONITOR
INTERFACE
FD[0:3]B
FD BITS/THRESHOLD
DETECT
MULTICHIP
SYNC
VREF
SENSE
CML
–+
REFERENCE
SELECT
AD9600
NOTES
1. PIN NAMES ARE FOR THE CMOS PIN CONFIGURATION ONLY;
SEE FIGURE 7 FOR LVDS PIN NAMES.
Figure 1.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| AD9600BCPZ-105 | 制造商:Analog Devices 功能描述:ADC Dual Pipelined 105Msps 10-bit Parallel/LVDS 64-Pin LFCSP EP |
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