參數(shù)資料
型號(hào)： AD9640-105EBZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 32/52頁(yè)
文件大?。?/td> 0K
描述： ADC 14BIT 105MSPS DUAL 64-LFCSP
設(shè)計(jì)資源： Interfacing ADL5534 to AD9640 High Speed ADC (CN0049)
AD9640 Eval Brd Family Gerber Files
AD9640 Eval Brd BOM
AD9640 Eval Brd Schematic
標(biāo)準(zhǔn)包裝： 1
ADC 的數(shù)量： 2
位數(shù)： 14
采樣率（每秒）： 105M
數(shù)據(jù)接口： 串行
輸入范圍： 2 Vpp
在以下條件下的電源（標(biāo)準(zhǔn)）： 730mW @ 105MSPS
工作溫度： -40°C ~ 85°C
已用 IC / 零件： AD9640
已供物品： 板
AD9640
Rev. B | Page 38 of 52
BUILT-IN SELF-TEST (BIST) AND OUTPUT TEST
The AD9640 includes built-in test features to enable verification
of the integrity of each channel as well as to facilitate board level
debugging. A built-in self-test (BIST) feature is included that
verifies the integrity of the digital data path of the AD9640.
Various output test options are also provided to place predictable
values on the outputs of the AD9640.
BUILT-IN SELF-TEST (BIST)
The BIST is a thorough test of the digital portion of the selected
AD9640 signal path. When enabled, the test runs from an internal
PN source through the digital data path starting at the ADC
block output. The BIST sequence runs for 512 cycles and stops.
The BIST signature value for Channel A or Channel B is placed
in Register 0x024 and Register 0x025. If one channel is chosen,
its BIST signature is written to the two registers. If both channels
are chosen, the results from the A channel are placed in the
BIST signature register.
The outputs are not disconnected during this test, so the PN
sequence can be observed as it runs. The PN sequence can be
continued from its last value or started from the beginning,
based on the value programmed in Register 0x00E, Bit 2. The
BIST signature result varies based on the channel configuration.
OUTPUT TEST MODES
The output test options are shown in Table 25. When an output
test mode is enabled, the analog section of the ADC is discon-
nected from the digital backend blocks and the test pattern is run
through the output formatting block. Some of the test patterns are
subject to output formatting and some are not. The seed value for
the PN sequence tests can be forced if the PN reset bits are used
to hold the generator in reset mode by setting Bit 4 or Bit 5 of
Register 0x0D. These tests can be performed with or without
an analog signal (if present, the analog signal is ignored), but
they do require an encode clock. For more information, see the
AN-877 Application Note, Interfacing to High Speed ADCs via SPI.
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AD9640-150EBZ 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開(kāi)發(fā)工具 14Bit 150MspsDual 1.8V PB Free ADC RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評(píng)估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V
AD9640-80EBZ 功能描述:ADC 14BIT 80MSPS DUAL 64-LFCSP RoHS:是 類別:編程器，開(kāi)發(fā)系統(tǒng) >> 評(píng)估板 - 模數(shù)轉(zhuǎn)換器 (ADC) 系列:- 產(chǎn)品培訓(xùn)模塊:Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- ADC 的數(shù)量:1 位數(shù):12 采樣率（每秒）:94.4k 數(shù)據(jù)接口:USB 輸入范圍:±VREF/2 在以下條件下的電源（標(biāo)準(zhǔn)）:- 工作溫度:-40°C ~ 85°C 已用 IC / 零件:MAX11645 已供物品:板，軟件
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AD9640ABCPZ-125 功能描述:IC ADC 14BIT 125MSPS 64LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:250 系列:- 位數(shù):12 采樣率（每秒）:1.8M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:1.82W 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-LQFP 供應(yīng)商設(shè)備封裝:48-LQFP（7x7） 包裝:管件 輸入數(shù)目和類型:2 個(gè)單端，單極
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