I AV D (m A ) I
參數(shù)資料
型號(hào): AD9709ASTZ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 10/32頁(yè)
文件大小: 0K
描述: IC DAC 8BIT DUAL 125MSPS 48-LQFP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 1
系列: TxDAC+®
設(shè)置時(shí)間: 35ns
位數(shù): 8
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 2
電壓電源: 模擬和數(shù)字
功率耗散(最大): 450mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-LQFP
供應(yīng)商設(shè)備封裝: 48-LQFP(7x7)
包裝: 托盤
輸出數(shù)目和類型: 4 電流,單極;4 電流,雙極
采樣率(每秒): 125M
產(chǎn)品目錄頁(yè)面: 785 (CN2011-ZH PDF)
配用: AD9709-EBZ-ND - BOARD EVAL FOR AD9709
AD9709
Rev. B | Page 18 of 32
80
70
60
50
40
30
20
10
02
20
15
10
5
I AV
D
(m
A
)
IOUTFS (mA)
00
60
6-
0
32
SLEEP MODE OPERATION
The AD9709 has a power-down function that turns off the
output current and reduces the supply current to less than
8.5 mA over the specified supply range of 3.3 V to 5 V and
temperature range. This mode can be activated by applying a
Logic Level 1 to the SLEEP pin. The SLEEP pin logic threshold
is equal to 0.5 × AVDD. This digital input also contains an active
pull-down circuit that ensures the AD9709 remains enabled if
this input is left disconnected. The AD9709 requires less than
50 ns to power down and approximately 5 μs to power back up.
POWER DISSIPATION
The power dissipation, PD, of the AD9709 is dependent on several
factors, including
5
.5
Figure 33. IAVDD vs. IOUTFS
the power supply voltages (AVDD and DVDD1/DVDD2)
35
30
25
20
15
10
5
0
00
0.4
0.3
0.2
0.1
I DVD
D
(m
A
)
RATIO (
fOUT/fCLK)
125MSPS
100MSPS
65MSPS
25MSPS
5MSPS
0
06
-0
33
the full-scale current output (IOUTFS)
the update rate (fCLK)
the reconstructed digital input waveform
The power dissipation is directly proportional to the analog
supply current, IAVDD, and the digital supply current, IDVDD. IAVDD
is directly proportional to IOUTFS, as shown in Figure 33, and is
insensitive to fCLK.
Conversely, IDVDD is dependent on the digital input waveform,
fCLK, and digital supply (DVDD1/DVDD2). Figure 34 and
Figure 35 show IDVDD as a function of full-scale sine wave output
ratios (fOUT/fCLK) for various update rates with DVDD1 =
DVDD2 = 5 V and DVDD1 = DVDD2 = 3.3 V, respectively.
Note how IDVDD is reduced by more than a factor of 2 when
DVDD1/DVDD2 is reduced from 5 V to 3.3 V.
Figure 34. IDVDD vs. Ratio @ DVDD1 = DVDD2 = 5 V
18
16
14
12
10
8
6
4
2
0
00
0.4
0.3
0.2
0.1
I DVD
D
(m
A
)
RATIO (
fOUT/fCLK)
.5
125MSPS
100MSPS
65MSPS
25MSPS
5MSPS
0
06
-0
34
Figure 35. IDVDD vs. Ratio @ DVDD1 = DVDD2 = 3.3 V
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