AD9714/AD9715/AD9716/AD9717
Rev. A | Page 30 of 80
–55
–60
–65
–70
20
25
30
35
40
fOUT (MHz)
ACL
R
(
d
Bc)
07
26
5-
0
78
1mA PRECAL
1mA POSTCAL
2mA PRECAL
2mA POSTCAL
Figure 78. AD9717 Two-Carrier W-CDMA Third ACLR, 1.8 V
0.4
0.3
0.2
0.1
0
–0.1
–0.2
–0.3
–0.5
–0.4
0
CODE
AUX
DAC
DNL
(
L
S
B
)
128
256
384
512
640
768
896
1024
0
72
65
-1
47
Figure 79. AUXDAC DNL
25
20
15
10
5
0
20
40
60
80
100
120
140
fCLK (MHz)
CUR
RE
NT
(
m
A)
07
26
5-
0
41
CVDD
TOTAL CURRENT @ 1mA OUT
TOTAL CURRENT @ 2mA OUT
DVDD
AVDD @ 1mA OUT
AVDD @ 2mA OUT
Figure 80. Supply Current vs. Clock Frequency at 1.8 V
–55
–60
–65
–70
–75
20
25
30
35
40
fOUT (MHz)
ACL
R
(
d
Bc)
07
26
5-
0
81
1mA POSTCAL
1mA PRECAL
2mA PRECAL
2mA POSTCAL
4mA PRECAL
4mA POSTCAL
Figure 81. AD9717 Two-Carrier W-CDMA Third ACLR, 3.3 V
1.0
0.8
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
–1.0
–0.8
0
CODE
AUX
DAC
I
NL
(
L
S
B)
128
256
384
512
640
768
896
1024
0
72
65
-1
44
Figure 82. AUXDAC INL
CVDD
DVDD
30
20
10
0
20
40
60
80
100
120
140
fCLK (MHz)
C
URRE
N
T
(
m
A)
07
26
5-
0
44
TOTAL CURRENT @ 4mA OUT
TOTAL CURRENT @ 2mA OUT
AVDD @ 1mA OUT
AVDD @ 4mA OUT
AVDD @ 2mA OUT
TOTAL CURRENT @ 1mA OUT
Figure 83. Supply Current vs. Clock Frequency at 3.3 V