參數(shù)資料
型號： AD9743-DPG2-EBZ
廠商： Analog Devices Inc
文件頁數(shù)： 2/28頁
文件大?。?/td> 0K
描述： IC DAC DUAL 10BIT 72LFCSP
設(shè)計(jì)資源： AD9747/6/5/3/1 DPG2 Eval Brd Schematic
標(biāo)準(zhǔn)包裝： 1
DAC 的數(shù)量： 2
位數(shù)： 10
采樣率（每秒）： 250M
數(shù)據(jù)接口： 并聯(lián)
DAC 型： 電流
工作溫度： -40°C ~ 85°C
已供物品： 板
已用 IC / 零件： AD9743
AD9741/AD9743/AD9745/AD9746/AD9747
Data Sheet
Rev. A | Page 10 of 28
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
CVDD18
CVSS
CLKP
CLKN
CVSS
CVDD18
DVSS
DVDD18
P1D9
P1D8
P1D7
P1D6
P1D5
P1D4
P1D3
P1D2
17
P1D1
18
P1D0
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
NC
DCO
NC
DV
DD33
D
VSS
IQS
E
L
NC
P
2D9
P
2D8
P
2D7
P
2D6
35
P
2D5
36
P
2D4
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
FSADJ
RESET
CSB
SCLK
SDIO
SDO
DVSS
DVDD18
NC
P2D0
P2D1
P2D2
P2D3
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
A
V
DD33
A
V
DD33
A
VSS
IOU
T1
P
IOU
T1
N
A
VSS
AUX
1
P
AUX
1N
A
VSS
AUX
2N
AUX
2
P
A
VSS
IOU
T2
N
IOU
T2
P
A
VSS
A
V
DD33
A
V
DD33
R
E
FIO
NC = NO CONNECT
06569-
005
PIN 1
INDICATOR
AD9743
(TOP VIEW)
Figure 3. AD9743 Pin Configuration
Table 9. AD9743 Pin Function Descriptions
Pin No.
Mnemonic
Description
1, 6
CVDD18
Clock Supply Voltage (1.8 V).
2, 5
CVSS
Clock Supply Common (0 V).
3
CLKP
Differential DAC Clock Input.
4
CLKN
Complementary Differential DAC Clock Input.
7, 28, 48
DVSS
Digital Supply Common (0 V).
8, 47
DVDD18
Digital Core Supply Voltage (1.8 V).
9 to 18
P1D<9:0>
Port 1 Data Bit Inputs.
19 to 24, 26, 30, 41 to 46
NC
No Connect.
25
DCO
Data Clock Output. Use to clock data source.
27
DVDD33
Digital I/O Supply Voltage (3.3 V).
29
IQSEL
I/Q Framing Signal for Single-Port Mode Operation.
31 to 40
P2D<9:0>
Port 2 Data Bit Inputs.
49
SDO
Serial Peripheral Interface Data Output.
50
SDIO
Serial Peripheral Interface Data Input and Optional Data Output.
51
SCLK
Serial Peripheral Interface Clock Input.
52
CSB
Serial Peripheral Interface Chip Select Input. Active low.
53
RESET
Hardware Reset. Active high.
54
FSADJ
Full-Scale Current Output Adjust. Connect a 10 kΩ resistor to AVSS.
55
REFIO
Reference Input/Output. Connect a 0.1 μF capacitor to AVSS.
56, 57, 71, 72
AVDD33
Analog Supply Voltage (3.3 V).
58, 61, 64, 67, 70
AVSS
Analog Supply Common (0 V).
59
IOUT2P
DAC2 Current Output True. Sources full-scale current when input data bits are all 1.
60
IOUT2N
DAC2 Current Output Complement. Sources full-scale current when data bits are all 0.
62
AUX2P
Auxiliary DAC2 Default Current Output Pin.
63
AUX2N
Auxiliary DAC2 Optional Output Pin. Enable through SPI.
65
AUX1N
Auxiliary DAC1 Optional Output Pin. Enable through SPI.
66
AUX1P
Auxiliary DAC1 Default Current Output Pin.
68
IOUT1N
Complementary DAC1 Current Output. Sources full-scale current when data bits are all 0.
69
IOUT1P
DAC1 Current Output. Sources full-scale current when data bits are all 1.
EPAD
AVSS
Exposed Thermal Pad. Must be soldered to copper pour on top surface of PCB for mechanical
stability and must be electrically tied to low impedance GND plane for low noise performance.
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