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參數(shù)資料
| 型號(hào)： | AD9750-EB |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 9/22頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL FOR AD9750 |
| 產(chǎn)品培訓(xùn)模塊： | DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | TxDAC® |
| DAC 的數(shù)量： | 1 |
| 位數(shù)： | 10 |
| 采樣率（每秒）： | 125M |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 設(shè)置時(shí)間： | 35ns |
| DAC 型： | 電流 |
| 工作溫度： | -40°C ~ 85°C |
| 已供物品： | 板 |
| 已用 IC / 零件： | AD9750 |
| 相關(guān)產(chǎn)品： | AD9750ARZ-ND - IC DAC 10BIT 125MSPS 28-SOIC AD9750ARUZ-ND - IC DAC 10BIT 125MSPS 28TSSOP AD9750ARUZRL7-ND - IC DAC 10BIT 125MSPS 28TSSOP AD9750ARZRL-ND - IC DAC 10BIT 125MSPS 28SOIC |
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AD9750
–17–
REV. 0
It is also possible to generate a QAM signal completely in the
digital domain via a DSP or ASIC, in which case only a single
DAC of sufficient resolution and performance is required to
reconstruct the QAM signal. Also available from several vendors
are Digital ASICs which implement other digital modulation
schemes such as PSK and FSK. This digital implementation has
the benefit of generating perfectly matched I and Q components
in terms of gain and phase, which is essential in maintaining
optimum performance in a communication system. In this imple-
mentation, the reconstruction DAC must be operating at a
sufficiently high clock rate to accommodate the highest specified
QAM carrier frequency. Figure 37 shows a block diagram of
such an implementation using the AD9750.
50
AD9750
LPF
50
TO
MIXER
12
COS
12
SIN
12
I DATA
Q DATA
12
CARRIER
FREQUENCY
12
STEL-1177
NCO
CLOCK
STEL-1130
QAM
Figure 37. Digital QAM Architecture
AD9750 EVALUATION BOARD
General Description
The AD9750-EB is an evaluation board for the AD9750 10-bit
D/A converter. Careful attention to layout and circuit design
combined with a prototyping area allow the user to easily and
effectively evaluate the AD9750 in any application where high
resolution, high speed conversion is required.
This board allows the user the flexibility to operate the AD9750 in
various configurations. Possible output configurations include
transformer coupled, resistor terminated, inverting/noninverting
and differential amplifier outputs. The digital inputs are designed
to be driven directly from various word generators, with the
on-board option to add a resistor network for proper load ter-
mination. Provisions are also made to operate the AD9750
with either the internal or external reference, or to exercise the
power-down feature.
Refer to the application note AN-420 for a thorough description
and operating instructions for the AD9750 evaluation board.
AD9750
(“I DAC”)
AD9750
(“Q DAC”)
IOUTA
IOUTB
QOUTA
QOUTB
DCOM
FSADJ
REFIO
SLEEP
RSET2
1.9k
0.1 F
CLK
Q DATA
INPUT
I DATA
INPUT
DVDD
AVDD
100W
500
100
CFILTER
100
CFILTER
100
500
634
0.1 F
+5V
VPBF
BBIP
BBIN
BBQP
BBQN
AD8346
PHASE
SPLITTER
LOIP
LOIN
VOUT
500mV p-p WITH
VCM=1.2V
NOTE: 500
RESISTOR NETWORK - OHMTEK ORN5000D
100
RESISTOR NETWORK - TOMC1603-100D
REFLO
ACOM
REFLO
AVDD
REFIO
FSADJ
RSET1
2k
RCAL
220
U1
U2
AVDD
1.82V
LATCHES
500
DAC
+
LATCHES
Figure 36. Baseband QAM Implementation Using Two AD9750s
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