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參數(shù)資料
| 型號： | AD9752ARZRL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 19/23頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 12BIT 125MSPS 28SOIC |
| 產品培訓模塊： | Data Converter Fundamentals DAC Architectures |
| 標準包裝： | 1,000 |
| 系列： | TxDAC® |
| 設置時間： | 35ns |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉換器數(shù)目： | 1 |
| 電壓電源： | 模擬和數(shù)字 |
| 功率耗散（最大）： | 220mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-SOIC（0.295"，7.50mm 寬） |
| 供應商設備封裝： | 28-SOIC W |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 2 電流，單極；2 電流，雙極 |
| 采樣率（每秒）： | 125M |
REV. 0
AD9752
–5–
PIN CONFIGURATION
14
13
12
11
17
16
15
20
19
18
10
9
8
1
2
3
4
7
6
5
TOP VIEW
(Not to Scale)
28
27
26
25
24
23
22
21
AD9752
NC = NO CONNECT
(MSB) DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
NC
CLOCK
DVDD
DCOM
NC
AVDD
ICOMP
IOUTA
IOUTB
ACOM
NC
FS ADJ
REFIO
REFLO
SLEEP
PIN FUNCTION DESCRIPTIONS
Pin No.
Name
Description
1
DB11
Most Significant Data Bit (MSB).
2–11
DB10–DB1 Data Bits 1–10.
12
DB0
Least Significant Data Bit (LSB).
13, 14,
19, 25
NC
No Internal Connection.
15
SLEEP
Power-Down Control Input. Active High. Contains active pull-down circuit, thus may be left unterminated
if not used.
16
REFLO
Reference Ground when Internal 1.2 V Reference Used. Connect to AVDD to disable internal reference.
17
REFIO
Reference Input/Output. Serves as reference input when internal reference disabled (i.e., Tie REFLO to
AVDD). Serves as 1.2 V reference output when internal reference activated (i.e., Tie REFLO to ACOM).
Requires 0.1
F capacitor to ACOM when internal reference activated.
18
FS ADJ
Full-Scale Current Output Adjust.
19
NC
No Connect.
20
ACOM
Analog Common.
21
IOUTB
Complementary DAC Current Output. Full-scale current when all data bits are 0s.
22
IOUTA
DAC Current Output. Full-scale current when all data bits are 1s.
23
ICOMP
Internal Bias Node for Switch Driver Circuitry. Decouple to ACOM with 0.1
F capacitor.
24
AVDD
Analog Supply Voltage (+4.5 V to +5.5 V).
26
DCOM
Digital Common.
27
DVDD
Digital Supply Voltage (+2.7 V to +5.5 V).
28
CLOCK
Clock Input. Data latched on positive edge of clock.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD9752-EB | 制造商:Analog Devices 功能描述:Evaluation Board For AD9752 制造商:Analog Devices 功能描述:DEV TOOLS, EVAL BD FOR AD9752 - Bulk |
| AD9752-EBZ | 功能描述:BOARD EVAL FOR AD9752 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 數(shù)模轉換器 (DAC) 系列:TxDAC® 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:1 系列:- DAC 的數(shù)量:4 位數(shù):12 采樣率（每秒）:- 數(shù)據(jù)接口:串行，SPI? 設置時間:3µs DAC 型:電流/電壓 工作溫度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581 |
| AD9753 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Analog Devices: Data Converters: DAC 12-Bit, 10 ns to 100 ns Converters Selection Table |
| AD9753AST | 制造商:Analog Devices 功能描述:DAC 1-CH Segment 12-bit 48-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:12-BIT, 300 MSPS TXDAC+ D/A CONVERTER - Tape and Reel 制造商:Analog Devices 功能描述:IC 12-BIT DAC |
| AD9753ASTRL | 制造商:Analog Devices 功能描述:DAC 1-CH Segment 12-bit 48-Pin LQFP T/R 制造商:Rochester Electronics LLC 功能描述:12-BIT, 300 MSPS TXDAC+ D/A CONVERTER - Tape and Reel |
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