Maximum Output Update Rate (f
參數(shù)資料
型號: AD9764-EBZ
廠商: Analog Devices Inc
文件頁數(shù): 16/22頁
文件大?。?/td> 0K
描述: BOARD EVAL FOR AD9764
產(chǎn)品培訓(xùn)模塊: DAC Architectures
標準包裝: 1
系列: TxDAC®
DAC 的數(shù)量: 1
位數(shù): 14
采樣率(每秒): 125M
數(shù)據(jù)接口: 并聯(lián)
設(shè)置時間: 35ns
DAC 型: 電流
工作溫度: -40°C ~ 85°C
已供物品:
已用 IC / 零件: AD9764
REV. B
–3–
AD9764
DYNAMIC SPECIFICATIONS
Parameter
Min
Typ
Max
Units
DYNAMIC PERFORMANCE
Maximum Output Update Rate (fCLOCK)
125
MSPS
Output Settling Time (tST) (to 0.1%)
1
35
ns
Output Propagation Delay (tPD)1
ns
Glitch Impulse
5
pV-s
Output Rise Time (10% to 90%)1
2.5
ns
Output Fall Time (10% to 90%)1
2.5
ns
Output Noise (IOUTFS = 20 mA)
50
pA/
√Hz
Output Noise (IOUTFS = 2 mA)
30
pA/
√Hz
AC LINEARITY
Spurious-Free Dynamic Range to Nyquist
fCLOCK = 25 MSPS; fOUT = 1.00 MHz
0 dBFS Output
TA = +25
°C
75
82
dBc
TMIN to TMAX
73
dBc
–6 dBFS Output
85
dBc
–12 dBFS Output
77
dBc
–18 dBFS Output
70
dBc
fCLOCK = 50 MSPS; fOUT = 1.00 MHz
80
dBc
fCLOCK = 50 MSPS; fOUT = 2.51 MHz
77
dBc
fCLOCK = 50 MSPS; fOUT = 5.02 MHz
70
dBc
fCLOCK = 50 MSPS; fOUT = 20.2 MHz
58
dBc
Spurious-Free Dynamic Range within a Window
fCLOCK = 25 MSPS; fOUT = 1.00 MHz; 2 MHz Span
TA = +25
°C
78
89
dBc
TMIN to TMAX
76
dBc
fCLOCK = 50 MSPS; fOUT = 5.02 MHz; 2 MHz Span
84
dBc
fCLOCK = 100 MSPS; fOUT = 5.04 MHz; 4 MHz Span
84
dBc
Total Harmonic Distortion
fCLOCK = 25 MSPS; fOUT = 1.00 MHz
TA = +25
°C
–78
–74
dBc
TMIN to TMAX
–72
dBc
fCLOCK = 50 MHz; fOUT = 2.00 MHz
–75
dBc
fCLOCK = 100 MHz; fOUT = 2.00 MHz
–75
dBc
Multitone Power Ratio (Eight Tones at 110 kHz Spacing)
fCLOCK = 20 MSPS; fOUT = 2.00 MHz to 2.99 MHz
0 dBFS Output
73
dBc
–6 dBFS Output
76
dBc
–12 dBFS Output
73
dBc
–18 dBFS Output
64
dBc
NOTES
1Measured single-ended into 50
load.
Specifications subject to change without notice.
(TMIN to TMAX , AVDD = +5 V, DVDD = +5 V, IOUTFS = 20 mA, Differential Transformer Coupled Output,
50
Doubly Terminated, unless otherwise noted)
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