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參數(shù)資料
| 型號： | AD9767ASTZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 15/44頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 14BIT DUAL 125MSPS 48LQFP |
| 產(chǎn)品培訓模塊： | DAC Architectures |
| 標準包裝： | 1 |
| 系列： | TxDAC+® |
| 設置時間： | 35ns |
| 位數(shù)： | 14 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉換器數(shù)目： | 2 |
| 電壓電源： | 模擬和數(shù)字 |
| 功率耗散（最大）： | 450mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-LQFP |
| 供應商設備封裝： | 48-LQFP（7x7） |
| 包裝： | 托盤 |
| 輸出數(shù)目和類型： | 4 電流，單極；4 電流，雙極 |
| 采樣率（每秒）： | 125M |
| 產(chǎn)品目錄頁面： | 785 (CN2011-ZH PDF) |
| 配用： | AD9767-EBZ-ND - BOARD EVAL FOR AD9767 |
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AD9763/AD9765/AD9767
Data Sheet
Rev. G | Page 22 of 44
The full-scale output current of each DAC is regulated by
separate reference control amplifiers and can be set from
2 mA to 20 mA via an external network connected to the full
scale adjust (FSADJ) pin. The external network, in combination
with both the reference control amplifier and voltage reference
(VREFIO) sets the reference current IREF, which is replicated to the
segmented current sources with the proper scaling factor. The
full-scale current (IOUTFS) is 32 × IREF.
REFERENCE OPERATION
The AD9763/AD9765/AD9767 contain an internal 1.20 V band
gap reference. This can easily be overridden by a low noise external
reference with no effect on performance. REFIO serves as either
an input or output, depending on whether the internal or an
external reference is used. To use the internal reference, simply
decouple the REFIO pin to ACOM with a 0.1 μF capacitor. The
internal reference voltage is present at REFIO. If the voltage at
REFIO is used elsewhere in the circuit, an external buffer amplifier
with an input bias current of less than 100 nA should be used. An
example of the use of the internal reference is shown in Figure 59.
AD9763/
AD9765/
AD9767
REFERENCE
SECTION
AVDD
GAINCTRL
REFIO
FSADJ1/
FSADJ2
ACOM
CURRENT
SOURCE
ARRAY
1.2V
REF
IREF
0.1F
OPTIONAL
EXTERNAL
REFERENCE
BUFFER
ADDITIONAL
EXTERNAL
LOAD
RSET
256
22nF
0061
7-
059
Figure 59. Internal Reference Configuration
An external reference can be applied to REFIO as shown in
Figure 60. The external reference can provide either a fixed
reference voltage to enhance accuracy and drift performance
or a varying reference voltage for gain control. The 0.1 μF
compensation capacitor is not required because the internal
reference is overridden and the relatively high input impedance
of REFIO minimizes any loading of the external reference.
IREF
RSET
AVDD
GAINCTRL
REFIO
FSADJ1/
FSADJ2
ACOM
AVDD
CURRENT
SOURCE
ARRAY
EXTERNAL
REFERENCE
1.2V
REF
0
06
17
-06
0
AD9763/
AD9765/
AD9767
REFERENCE
SECTION
256
22nF
Figure 60. External Reference Configuration Gain Control Mode
GAIN CONTROL MODE
The AD9763/AD9765/AD9767 has two gain control modes,
independent and master/slave. If the GAINCTRL terminal is low
(connected to ground), the full-scale currents of DAC1 and DAC2
are set separately using two different RSET resistors. One resistor
is connected to the FSADJ1 terminal, and the other resistor is
connected to the FSADJ2 terminal. This is independent mode.
If the GAINCTRL terminal is set high (connected to AVDD),
the full-scale currents of DAC1 and DAC2 are set to the same value
using one RSET resistor. In master/slave mode, full-scale current
for both DAC1 and DAC2 is set via the FSADJ1 terminal.
SETTING THE FULL-SCALE CURRENT
Both of the DACs in the AD9763/AD9765/AD9767 contain a
control amplifier that is used to regulate the full-scale output
current (IOUTFS). The control amplifier is configured as a V-I
is determined by the ratio of the VREFIO and an external resistor,
RSET.
IREF = VREFIO/RSET
The DAC full-scale current, IOUTFS, is an output current 32 times
larger than the reference current, IREF.
IOUTFS = 32 × IREF
The control amplifier allows a wide (10:1) adjustment span of
IOUTFS from 2 mA to 20 mA by setting IREF between 62.5 μA and
625 μA. The wide adjustment range of IOUTFS provides several
benefits. The first relates directly to the power dissipation of the
AD9763/AD9765/AD9767, which is proportional to IOUTFS (refer to
the Power Dissipation section). The second relates to the 20 dB
adjustment, which is useful for system gain control purposes.
To ensure that the AD9763/AD9765/AD9767 performs properly,
connect a 22 nF capacitor and 256 Ω resistor network (shown in
and from the FSADJ2 terminal to ground.
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