- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄10099 > AD976AARZ-RL (Analog Devices Inc)IC ADC 16BIT 200KSPS 28SOIC PDF資料下載
參數(shù)資料
| 型號： | AD976AARZ-RL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 13/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 16BIT 200KSPS 28SOIC |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 200k |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 100mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 28-SOIC |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 1 個(gè)單端，雙極 |
AD976/AD976A
–6–
REV. C
PIN FUNCTION DESCRIPTIONS
Pin No.
Mnemonic
Description
1VIN
Analog Input. Connect a 200
resistor between V
IN and the analog signal source. The full-scale
input range is
±10 V.
2
AGND1
Analog Ground. Used as the ground reference point for the REF pin.
3
REF
Reference Input/Output. The internal +2.5 V reference is available at this pin. Alternatively, an
external reference can be used to override the internal reference. In either case, connect a 2.2
F
tantalum capacitor between REF and AGND1.
4
CAP
Reference Buffer Output. Connect a 2.2
F tantalum capacitor between CAP and AGND2.
5
AGND2
Analog Ground.
6
D15 (MSB)
Data Bit 15. Most significant bit of conversion result. High impedance state when CS is HIGH or
when R/C is LOW.
7–13
D14–D8
Data Bits 14–8. High impedance state when CS is HIGH or when R/C is LOW.
14
DGND
Digital Ground.
15–21
D7–D1
Data Bits 7–1. High impedance state when CS is HIGH or when R/C is LOW.
22
D0 (LSB)
Data Bit 0. Least significant bit of conversion result. High impedance state when CS is HIGH or
when R/C is LOW.
23
BYTE
Byte Select. With BYTE LOW, data will be output as indicated above; Pin 6 (D15) is the MSB,
Pin 22 (D0) is the LSB. With BYTE HIGH, the top and bottom 8 bits of data will be switched;
D15–D8 are output on Pins 15–22 and D7–D0 are output on Pins 6–13.
24
R/C
Read/Convert Input. With CS LOW, a falling edge on R/C puts the internal sample/hold into the
hold state and starts a conversion; a rising edge enables the output data bits.
25
CS
Chip Select Input. Internally OR’d with R/C. With R/C LOW, a falling edge on CS will initiate a
conversion. With R/C HIGH, a falling edge on CS will enable the output data bits. When CS is
HIGH, the output data bits will be in the Hi-impedance state.
26
BUSY
Busy Output. Goes LOW when a conversion is started and remains LOW until the conversion is
completed and the data is latched into the output register. With CS tied LOW and R/C HIGH,
output data will be valid when BUSY rises. The rising edge of BUSY can be used to latch the out-
put data.
27
VANA
Analog Power Supply. Nominally +5 V.
28
VDIG
Digital Power Supply. Nominally +5 V.
DEFINITION OF SPECIFICATIONS
INTEGRAL NONLINEARITY ERROR (INL)
Linearity error refers to the deviation of each individual code
from a line drawn from “negative full scale” to “positive full
scale.” The point used as negative full scale occurs 1/2 LSB
before the first code transition. Positive full scale is defined as a
level 1 1/2 LSB beyond the last code transition. The deviation is
measured from the middle of each particular code to the true
straight line.
DIFFERENTIAL NONLINEARITY ERROR (DNL)
In an ideal ADC, code transitions are 1 LSB apart. Differential
nonlinearity is the maximum deviation from this ideal value. It
is often specified in terms of resolution for which no missing
codes are guaranteed.
FULL-SCALE ERROR
The last + transition (from 011. . .10 to 011. . .11) should
occur for an analog voltage 1 1/2 LSB below the nominal full
scale (9.9995422 V for a
±10 V range). The full-scale error is
the deviation of the actual level of the last transition from the
ideal level.
BIPOLAR ZERO ERROR
Bipolar zero error is the difference between the ideal midscale
input voltage (0 V) and the actual voltage producing the midscale
output code.
INPUT BANDWIDTH
The input bandwidth is that frequency at which the amplitude
of the reconstructed fundamental is reduced by 3 dB for a full-
scale input.
FULL-POWER BANDWIDTH
Full-power bandwidth is defined as the full-scale input fre-
quency at which signal to (Noise + Distortion) degrades to
60 dB, as 10 bits of accuracy.
APERTURE DELAY
Aperture delay is a measure of the Sample-and-Hold Amplifier
(SHA) performance and is measured from the rising edge of the
clock input to when the input signal is held for a conversion.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IDT72221L15PFI8 | IC FIFO SYNC 1KX9 15NS 32QFP |
| VI-23L-IX-B1 | CONVERTER MOD DC/DC 28V 75W |
| LT1780CSW#TR | IC TXRX 5V RS232 DUAL LP 18SOIC |
| MS3106E28-2S | CONN PLUG 14POS STRAIGHT W/SCKT |
| VI-201-MY | CONVERTER MOD DC/DC 12V 50W |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD976ABN | 功能描述:IC ADC 16BIT 200KSPS 28-DIP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個(gè)單端，雙極 |
| AD976ABNZ | 功能描述:IC ADC 16BIT 200KSPS 28-DIP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 其它有關(guān)文件:TSA1204 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):12 采樣率（每秒）:20M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:155mW 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應(yīng)商設(shè)備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數(shù)目和類型:4 個(gè)單端，單極；2 個(gè)差分，單極 產(chǎn)品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6 |
| AD976ABR | 功能描述:IC ADC 16BIT 200KSPS 28-SOIC RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個(gè)單端，雙極 |
| AD976ABRRL | 制造商:Analog Devices 功能描述:ADC Single SAR 200ksps 16-bit Parallel 28-Pin SOIC W T/R |
| AD976ABRS | 功能描述:IC ADC 16BIT 200KSPS 28-SSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個(gè)單端，雙極 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。