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Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
AD9801
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
World Wide Web Site: http://www.analog.com
Fax: 617/326-8703
Analog Devices, Inc., 1997
CCD Signal Processor
For Electronic Cameras
FUNCTIONAL BLOCK DIAGRAM
SHP
AD9801
PGA
PGACONT1 PGACONT2
CLAMP
CLPDM
CDS
PBLK
PIN
DIN
SHD ADCCLK
TIMING
GENERATOR
23
29
30
19
21
22
16
27
26
37
48
47
18
CMLEVEL VRT VRB STBY
REFERENCE
S/H
20
CLPOB
CLAMP
A/D
2
11
DOUT
33
ACVDD
43
ADVDD
17
DVDD
12
DRVDD
10
FEATURES
10-Bit, 18 MSPS A/D Converter
18 MSPS Full-Speed CDS
Low Noise, Wideband PGA
Internal Voltage Reference
No Missing Codes Guaranteed
+3 V Single Supply Operation
Low Power CMOS: 185 mW
48-Pin TQFP Package
PRODUCT DESCRIPTION
The AD9801 is a complete CCD signal processor developed for
electronic cameras. It is well suited for both video conferencing
and consumer level still camera applications.
The signal processing chain is comprised of a high speed CDS,
variable gain PGA and 10-bit ADC. Required clamping
circuitry and an onboard voltage reference are also provided.
The AD9801 operates from a single +3 V supply with a typical
power consumption of 185 mW.
The AD9801 is packaged in a space saving 48-pin thin-quad
flatpack (TQFP) and is specified over an operating temperature
range of 0
°
C to +70
°
C.
PRODUCT HIGHLIGHTS
1. On-Chip Input Clamp and CDS
Clamp circuitry and high speed correlated double sampler
allow for simple ac coupling to interface a CCD sensor at full
18 MSPS conversion rate.
2. On-Chip PGA
The AD9801 includes a low noise, wideband amplifier with
analog variable gain from 0 dB to 31.5 dB (linear in dB).
3. 10-Bit, High Speed A/D Converter
A linear 10-bit ADC is capable of digitizing CCD signals at
the full 18 MSPS conversion rate. (Typical DNL is
±
0.5 LSB
and no missing code performance is guaranteed.)
4. Low Power
At 185 mW, the AD9801 consumes a fraction of the power of
presently available multichip solutions. The part’s power-
down mode (15 mW) further enhances its desirability in low
power, battery operated applications.
5. Digital I/O Functionality
The AD9801 offers three-state digital output control.
6. Small Package
Packaged in a 48-pin, surface-mount thin-quad flatpack, the
AD9801 is well suited to very tight, low headroom designs.