- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄11670 > AD9944KCPZ (Analog Devices Inc)IC CCD SIGNAL PROCESSOR 32-LFCSP PDF資料下載
參數(shù)資料
| 型號： | AD9944KCPZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 20/20頁 |
| 文件大小： | 0K |
| 描述： | IC CCD SIGNAL PROCESSOR 32-LFCSP |
| 標準包裝： | 1 |
| 類型： | CCD 信號處理器，12 位 |
| 輸入類型： | 邏輯 |
| 輸出類型： | 邏輯 |
| 接口： | 3 線串口 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-VFQFN 裸露焊盤，CSP |
| 供應商設備封裝： | 32-LFCSP-VQ（5x5） |
| 包裝： | 托盤 |
Data Sheet
AD9943/AD9944
TERMINOLOGY
Differential Nonlinearity (DNL)
An ideal ADC exhibits code transitions that are exactly 1 LSB
apart. DNL is the deviation from this ideal value. Therefore
every code must have a finite width. No missing codes
guaranteed to 10-bit resolution indicates that all 1024 codes,
respectively, must be present over all operating conditions.
Peak Nonlinearity
Peak nonlinearity, a full-signal chain specification, refers to the
true straight line. The point used as zero scale occurs 1/2 LSB
before the first code transition. Positive full scale is defined as a
level 1 1/2 LSB beyond the last code transition. The deviation is
measured from the middle of each particular output code to the
true straight line. The error is then expressed as a percentage of
the 2 V ADC full-scale signal. The input signal is always
appropriately gained up to fill the ADC’s full-scale range.
Total Output Noise
The rms output noise is measured using histogram techniques.
The standard deviation of the ADC output codes is calculated
in LSB and represents the rms noise level of the total signal
chain at the specified gain setting. The output noise can be
converted to an equivalent voltage, using the relationship
(
)
codes
Scale
Full
ADC
N
2
LSB
1
=
where N is the bit resolution of the ADC. For example, 1 LSB of
the AD9943 is 1.95 mV.
Power Supply Rejection (PSR)
The PSR is measured with a step change applied to the supply
pins. This represents a very high frequency disturbance on the
calculated from the change in the data outputs for a given
step change in the supply voltage.
Internal Delay for SHP/SHD
The internal delay (also called aperture delay) is the time delay
that occurs from the time a sampling edge is applied to the
held. Both SHP and SHD sample the input signal during the
transition from low to high, so the internal delay is measured
from each clock’s rising edge to the instant the actual internal
sample is taken.
Rev. C | Page 9 of 20
相關PDF資料 |
PDF描述 |
|---|---|
| 3-221185-1 | PLUG,75 OHM,COML BNC |
| AD9943KCPZ | IC CCD SIGNAL PROCESSOR 32-LFCSP |
| AD8497CRMZ | IC THERMOCOUPLE A W/COMP 8MSOP |
| AD8496CRMZ | THERMOCOUPLE AMPLIFIER I |
| VE-J3N-IY-F2 | CONVERTER MOD DC/DC 18.5V 50W |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD9944KCPZ1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Complete 10-Bit and 12-Bit, 25 MHz CCD Signal Processors |
| AD9944KCPZRL | 功能描述:IC CCD SIGNAL PROCESSOR 32-LFCSP RoHS:是 類別:集成電路 (IC) >> 接口 - 傳感器和探測器接口 系列:- 其它有關文件:Automotive Product Guide 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:74 系列:- 類型:觸控式傳感器 輸入類型:數(shù)字 輸出類型:數(shù)字 接口:JTAG，串行 電流 - 電源:100µA 安裝類型:表面貼裝 封裝/外殼:20-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:20-TSSOP 包裝:管件 |
| AD9944KCPZRL1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Complete 10-Bit and 12-Bit, 25 MHz CCD Signal Processors |
| AD9945 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Complete 12-Bit 40 MHz CCD Signal Processor |
| AD9945KCP | 制造商:Analog Devices 功能描述:AFE Video 1ADC 12-Bit 3V 32-Pin LFCSP EP 制造商:Rochester Electronics LLC 功能描述:12 BIT 40 MSPS FRONT END CONVERTER - Bulk |
發(fā)布緊急采購，3分鐘左右您將得到回復。