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| 型號(hào)： | ADA4859-3ACPZ-R7 |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 5/16頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC AMP 3CH CFB G=2 W/CP 16LFCSP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 應(yīng)用： | 電流反饋 |
| 電路數(shù)： | 3 |
| -3db帶寬： | 265MHz |
| 轉(zhuǎn)換速率： | 740 V/µs |
| 電流 - 電源： | 17mA |
| 電流 - 輸出 / 通道： | 19mA |
| 電壓 - 電源，單路/雙路(±)： | 3 V ~ 5.5 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-VQFN 裸露焊盤(pán)，CSP |
| 供應(yīng)商設(shè)備封裝： | 16-LFCSP-VQ EP（4x4） |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 產(chǎn)品目錄頁(yè)面： | 768 (CN2011-ZH PDF) |
| 其它名稱： | ADA4859-3ACPZ-R7DKR |
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Data Sheet
ADA4859-3
Rev. A | Page 13 of 16
APPLICATIONS INFORMATION
USING THE ADA4859-3 IN GAINS EQUAL TO +1, 1
The ADA4859-3 was designed to offer outstanding video
performance, simplify applications, and minimize board area.
The ADA4859-3 is a triple amplifier with on-chip feedback
and gain set resistors. The gain is fixed internally at G = +2. The
inclusion of the on-chip resistors not only simplifies the design
of the application but also eliminates six surface-mount resistors,
saving valuable board space and lowering assembly costs.
Although the ADA4859-3 has a fixed gain of G = +2, it can be
used in other gain configurations, such as G = 1 and G = +1.
Unity-Gain Operation
Option 1
There are two options for obtaining unity gain (G = +1). The
first is shown in Figure 32. In this configuration, the IN input
pin is tied to the output. (Feedback is provided through the two
internal 550 resistors in parallel), and the input is applied to
the noninverting input. The noise gain for this configuration is 1.
0.1F
10F
VIN
RT
VOUT
+VS
GAIN OF +1
07715-
130
Figure 32. Unity Gain of Option 1
Option 2
Another option exists for running the ADA4859-3 as a unity-
gain amplifier. In this configuration, the noise gain is +2, see
Figure 33. The frequency response and transient response for
this configuration closely match the gain of +2 plots because the
noise gains are equal. This method does have twice the noise
gain of Option 1; however, in applications that do not require low
noise, Option 2 offers less peaking and ringing. By tying the inputs
together, the net gain of the amplifier becomes +1. Equation 1
shows the transfer characteristic for the schematic shown in
+
=
G
F
IN
G
F
IN
OUT
R
V
R
V
(1)
which simplifies to VOUT = VIN.
0.1F
VIN
RT
VOUT
+VS
GAIN OF +1
07715-
131
10F
RF
RG
Figure 33. Unity Gain of Option 2
Inverting Unity-Gain Operation
In this configuration, the noninverting input is tied to ground
and the input signal is applied to the inverting input. The noise
gain for this configuration is +2, see Figure 34.
0.01F
VIN
RT
VOUT
+VS
GAIN OF –1
07715-
132
10F
Figure 34. Inverting Configuration (G = 1)
Figure 35 shows the small signal frequency response for both
gain of +1 (Option 1 and Option 2) and gain of 1 configurations.
It is clear that the G = +1 Option 2 has better flatness and no
peaking compared to Option 1.
3
–9
–6
–3
0
1
10
100
1000
C
LOS
E
D
-LOOP
GA
IN
(
dB
)
FREQUENCY (MHz)
G = +1,
OPTION 1
G = +1,
OPTION 2
G = –1
07715-
031
VS = 5V
VOUT = 2V p-p
RL = 100
Figure 35. Large Signal, G = +1 and G = 1
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